參數(shù)資料
型號(hào): LPC47M182-NW
廠(chǎng)商: STANDARD MICROSYSTEMS CORP
元件分類(lèi): 外設(shè)及接口
英文描述: ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC
中文描述: MULTIFUNCTION PERIPHERAL, PQFP128
封裝: 14 X 20 MM, 2.70 MM HEIGHT, LEAD FREE, QFP-128
文件頁(yè)數(shù): 42/228頁(yè)
文件大?。?/td> 1269K
代理商: LPC47M182-NW
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SMSC DS – LPC47M192
Page 42
Rev. 03/30/05
DATASHEET
BIT NO.
4
SYMBOL
OR
NAME
DESCRIPTION
Overrun/
Underrun
Becomes set if the FDC does not receive CPU or DMA
service within the required time interval, resulting in data
overrun or underrun.
Unused. This bit is always "0".
Any one of the following:
1. Read Data, Read Deleted Data command - the FDC
did not find the specified sector.
2. Read ID command - the FDC cannot read the ID field
without an error.
3. Read A Track command - the FDC cannot find the
proper sector sequence.
Not Writeable WP pin became a "1" while the FDC is executing a Write
Data, Write Deleted Data, or Format A Track command.
Missing
Address Mark
1. The FDC did not detect an ID address mark at the
specified track after encountering the index pulse
from the nINDEX pin twice.
2. The FDC cannot detect a data address mark or a
deleted data address mark on the specified track.
3
2
ND
No Data
1
NW
0
MA
Any one of the following:
Table 14 – Status Register 2
BIT NO.
7
6
SYMBOL
NAME
DESCRIPTION
CM
Control Mark
Unused. This bit is always "0".
Any one of the following:
Read Data command - the FDC encountered a deleted
data address mark.
Read Deleted Data command - the FDC encountered a
data address mark.
The FDC detected a CRC error in the data field.
5
DD
Data Error in
Data Field
Wrong
Cylinder
Bad Cylinder
4
WC
The track address from the sector ID field is different
from the track address maintained inside the FDC.
Unused. This bit is always "0".
Unused. This bit is always "0".
The track address from the sector ID field is different
from the track address maintained inside the FDC and is
equal to FF hex, which indicates a bad track with a hard
error according to the IBM soft-sectored format.
The FDC cannot detect a data address mark or a
deleted data address mark.
3
2
1
BC
0
MD
Missing Data
Address Mark
Table 15 – Status Register 3
BIT NO.
7
6
SYMBOL
NAME
DESCRIPTION
WP
Write
Protected
Track 0
Head Address Indicates the status of the HDSEL pin.
Drive Select
Indicates the status of the DS1, DS0 pins.
Unused. This bit is always "0".
Indicates the status of the WRTPRT pin.
5
4
3
2
1,0
T0
HD
DS1,0
Unused. This bit is always "1".
Indicates the status of the TRK0 pin.
Unused. This bit is always "1".
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