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參數(shù)資料
| 型號： | LRI512-C40 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | EEPROM |
| 中文描述： | EEPROM的 |
| 文件頁數(shù)： | 31/54頁 |
| 文件大?。?/td> | 351K |
| 代理商： | LRI512-C40 |
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LRI512
WRITE SINGLE BLOCK
Command Code = 0x21
When receiving the Write Single Block Command,
the LRI512 writes the requested block with the
data contained in the Request, and reports the
success of the operation in the Response. The
Option_Flag is not supported.
During the write cycle, t
W
, no modulation (neither
100% nor 10%) shall occur, otherwise the LRI512
may program the data incorrectly in the memory.
The t
W
delay is a multiple of t
1nominal
.
Request parameter (Table 28):
– UID (Optional)
– Block Number
– Data
Response parameter (Table 29):
– No parameter. The response is sent back af-
ter the write cycle
Response parameter (Table 30):
– Error Code as Error_Flag is set
Table 28. Write Single Block Request Format
Table 29. Write Single Block Response Format when Error Flag is NOT Set
Table 30. Write Single Block Response Format when Error Flag is Set
Figure 35. WRITE Single Block Frame Exchange between VCD and LRI512
Request
SOF
Request
Flags
Write Single
Block
UID
Block
Number
Data
CRC16
Request
EOF
8 bits
0x21
64 bits
8 bits
32 bits
16bits
Response SOF
Response_Flags
CRC16
Response EOF
8 bits
16 bits
Response SOF
Response_Flags
Error Code
CRC16
Response EOF
8 bits
8 bits
16 bits
AI06833
VCD
LRI512
LRI512
t1
EOF
SOF
Write Single
Block Request
EOF
SOF
Write Single
Block Response
Write sequence when error
SOF
Write Single
Block Response
EOF
t1
tw
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