參數(shù)資料
型號: LS7060C
廠商: LSI Corporation
元件分類: 通用總線功能
英文描述: 32 BIT BINARY UP COUNTER WITH BYTE MULTIPLEXED THREE-STATE OUTPUTS
中文描述: 32位二進制字節(jié)復(fù)用與三個反態(tài)輸出
文件頁數(shù): 3/7頁
文件大?。?/td> 98K
代理商: LS7060C
DYNAMIC ELECTRICAL CHARACTERISTICS:
(V
DD
= +5V ± 5%, V
SS
= 0
V
, T
A
= 0C to +70C unless otherwise noted.)
PARAMETER
SYMBOL
Count Frequency
fc
(All Count inputs)
Count Pulse Width
t
CPW
(All Count Inputs)
MIN
DC
MAX
50
UNIT
MHz
CONDITIONS
-
10
-
ns
Measured at 50% point,
Max tr, t
f
= 1ns
Count Ripple Time
t
CR
-
20
ns
Transition from 32 ones to 32 zeros
from negative edge of count pulse
Reset Pulse Width
(All Counter Stages
Fully Reset)
t
RPW
20
-
ns
Measured at 50% point
Max t
r
, t
f
= 10ns
RESET Removal Time
(Reset Removed From
All Counter Stages)
t
RR
-
10
ns
Measured from RESET signal at V
IH
SCAN Frequency
SCAN Pulse Width
f
SC
t
SCPW
-
10
-
MHz
ns
50
Measured at 50% point
Max t
r
, t
f
= 10ns
Measured at 50% point
Max t
r
, t
f
= 5ns
SCAN RESET/LOAD
Pulse Width
(All latches loaded and
Scan Counter Reset to
Least Significant Byte)
t
RSCPW
10
-
ns
SCAN RESET/LOAD
Removal Time
(Reset Removed from
Scan Counter; Load
Command Removed
From Latches)
t
RSCR
-
10
ns
Measured from
SCAN RESET/LOAD at V
IH
Output Disable
Delay Time
(B0 - B7)
t
DOD
-
5
ns
Transition to Output High
Impedance State Measured
From Scan at V
IL
or
ENABLE at V
IH
Output ENABLE
Delay Time
(B0 - B7)
t
DOE
-
5
ns
Transition to Valid On State
Measured from Scan at V
IH
and ENABLE at V
IL
; Delay to
Valid Data Levels for C
OL
= 10pF
and one TTL Load or Valid Data
Currents for High Capacitance Loads
Output Delay Time
CASCADE ENABLE
t
DCE
-
10
ns
Negative Transition from Scan at V
IL
and ST5 of Scan Counter or Positive
Transition From SCAN RESET/LOAD at
V
IL
to Valid Data Levels for C
OL
= 12pF
and one TTL Load
SYMBOL MIN MAX UNIT CONDITIONS
INPUT CURRENT
*SCAN RESET/LOAD
I
IH
-
I
IL
-
**All Count inputs
I
IH
-
I
IL
-
-3.5
-5
5
1
μA
μA
μA
μA
V
DD
= Max, V
IH
= +3.5V
V
DD
= Max, V
IL
= 0V
V
DD
= Max, V
IH
= +3.5V
V
DD
= Max, V
IL
= 0.35V
*Input has internal pull-up resistor to V
DD
** Inputs have internal pull-down resistor to V
SS
7060C/61C-121901-3
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