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參數(shù)資料
| 型號： | LS7366R |
| 廠商： | LSI Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | 32-BIT QUADRATURE COUNTER WITH SERIAL INTERFACE |
| 中文描述： | 32位正交計數(shù)器串行接口 |
| 文件頁數(shù)： | 6/13頁 |
| 文件大?。?/td> | 101K |
| 代理商： | LS7366R |
Parameter Symbol Min. Value Max.Value Unit Remarks
Non-Quadrature Mode
(See Fig. 6 & 9)
Clock A - High Pulse Width
t
6
Clock A - Low Pulse Width
t
7
Direction Input B Set-up Time
t
8S
Direction Input B Hold Time
t
8H
Clock Frequency (non-Mod-N)
f
A
Clock to DFLAG/ or
t
9
LFLAG/ delay
DFLAG/ output width
t
10
12
12
12
10
-
20
-
-
-
-
40
-
ns
ns
ns
ns
MHz
ns
-
-
-
-
f
A
= (1/(t
6
+ t
7
))
-
12
-
ns
t
10
= t
7
Transient Characteristics
. (T
A
= -25C to +85C, V
DD
= 3.3V ± 10%)
Parameter Symbol Min. Value Max.Value Unit Remarks
(See Fig. 2)
SCK High Pulse Width
t
CH
120
SCK Low Pulse Width
t
CL
120
SS/ Set Up Time
t
CSL
120
SS/ Hold Time
t
CSH
120
-
-
-
-
-
-
-
-
ns
ns
ns
ns
Quadrature Mode
(See Fig. 5, 7 & 8)
f
CKI
High Pulse Width
f
CKI
Pulse Width
f
CKI
Frequency
Effective Filter Clock fF Period
t
1
t
2
f
FCK
t
3
t
3
f
F
t
4
t
5
f
QA
, f
QB
t
Q1
t
Q2
ti
d
ti
s
ti
h
24
24
-
50
100
-
52
105
-
4t
3
25
60
-
-
4.5t
3
-
-
20
-
-
20
-
-
4.5
5t
3
-
-
10
10
5.5t
3
ns
ns
MHz
ns
ns
MHz
ns
ns
MHz
-
ns
ns
ns
ns
ns
-
-
-
t
3
= t
1
+t
2
, MDR0 <7> = 0
t
3
= 2(t
1
+t
2
), MDR0 <7> = 1
f
F
= 1/ t
3
t
4
> t
3
t
5
≥
2
t3
f
QA
= f
QB
< 1/4t
3
-
t
Q2
= (t
3)
/2
t
id
> t
4
-
-
-
Effective Filter Clock f
F
frequency
Quadrature Separation
Quadrature Clock Pulse Width
Quadrature Clock frequency
Quadrature Clock to Count Delay
x1/x2/x4 Count Clock Pulse Width
Index Input Pulse Width
Index Set Up Time
Index Hold Time
Quadrature clock to
DFLAG/ or LFLAG/ delay
DFLAG/ output width
t
fl
t
fw
52
-
ns
t
fw
= t
4
Non-Quadrature Mode
(See Fig. 6 & 9)
Clock A - High Pulse Width
Clock A - Low Pulse Width
Direction Input B Set-up Time
Direction Input B Hold Time
Clock Frequency (non-Mod-N)
Clock to DFLAG/or
LFLAG/ delay
DFLAG/ output width
t
6
t
7
t
8S
t
8H
f
A
t
9
24
24
24
24
-
40
-
-
-
-
40
-
ns
ns
ns
ns
MHz
ns
-
-
-
-
f
A
= (1/(t
6
+ t
7
))
-
t
10
24
-
ns
t
10
= t
7
7366R-041906-6
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