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參數(shù)資料
| 型號(hào)： | LT1007IS8#PBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 16/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PREC OP-AMP HI-SPD SNGL 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 2.5 V/µs |
| 增益帶寬積： | 8MHz |
| 電流 - 輸入偏壓： | 15nA |
| 電壓 - 輸入偏移： | 20µV |
| 電壓 - 電源，單路/雙路(±)： | ±4 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 1317 (CN2011-ZH PDF) |
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9
LT1007/LT1037
sn100737 100737fbs
APPLICATIONS INFORMATION
WU
U
General
The LT1007/LT1037 series devices may be inserted
directly into OP-07, OP-27, OP-37 and 5534 sockets with
or without removal of external compensation or nulling
components. In addition, the LT1007/LT1037 may be
fitted to 741 sockets with the removal or modification of
external nulling components.
Offset Voltage Adjustment
The input offset voltage of the LT1007/LT1037 and its drift
with temperature, are permanently trimmed at wafer
testing to a low level. However, if further adjustment of
VOS is necessary, the use of a 10k nulling potentiometer
will not degrade drift with temperature. Trimming to a
value other than zero creates a drift of (VOS/ 300)V/°C,
e.g., if VOS is adjusted to 300V, the change in drift will be
1
V/°C (Figure 1).
The adjustment range with a 10k
pot is approximately
±2.5mV.Iflessadjustmentrangeisneeded,thesensitivity
and resolution of the nulling can be improved by using a
smaller pot in conjunction with fixed resistors. The ex-
ample has an approximate null range of
±200V
(Figure 2).
Offset Voltage and Drift
Thermocouple effects, caused by temperature gradients
across dissimilar metals at the contacts to the input
terminals, can exceed the inherent drift of the amplifier
unless proper care is exercised. Air currents should be
minimized, package leads should be short, the two input
leads should be close together and maintained at the same
temperature.
The circuit shown to measure offset voltage is also used
as the burn-in configuration for the LT1007/LT1037, with
the supply voltages increased to
±20V (Figure 3).
Figure 2. Improved Sensitivity Adjustment
1007/37 F02
1k
4.7k
OUTPUT
8
7 6
4
1
2
3
15V
–15V
–
+
LT1007
LT1037
4.7k
1007/37 F01
10k
OUTPUT
INPUT
8
7
6
4
1
2
3
15V
–15V
–
+
LT1007
LT1037
Figure 1. Standard Adjustment
Unity-Gain Buffer Application (LT1007 Only)
When RF ≤ 100 and the input is driven with a fast, large-
signal pulse (>1V), the output waveform will look as
shown in the pulsed operation diagram (Figure 4).
During the fast feedthrough-like portion of the output, the
input protection diodes effectively short the output to the
input and a current, limited only by the output short-circuit
protection, will be drawn by the signal generator. With
RF ≥ 500, the output is capable of handling the current
requirements (IL ≤ 20mA at 10V) and the amplifier stays
in its active mode and a smooth transition will occur.
1007/37 F04
LT1007
–
+
RF
OUTPUT
2.8V/
s
Figure 4. Pulsed Operation
1007/37 F03
VOUT
VOUT = 1000VOS
*RESISTORS MUST HAVE LOW
THERMOELECTRIC POTENTIAL
7
6
4
2
3
15V
–15V
–
+
LT1007
LT1037
50k*
100
*
50k*
Figure 3. Test Circuit for Offset Voltage and
Offset Voltage Drift with Temperature
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