參數(shù)資料
型號(hào): LT1010CT#31
廠商: Linear Technology
文件頁數(shù): 19/20頁
文件大?。?/td> 0K
描述: IC BUFFER HI-SPEED 150MA TO220-5
標(biāo)準(zhǔn)包裝: 50
放大器類型: 緩沖器
電路數(shù): 1
轉(zhuǎn)換速率: 75 V/µs
增益帶寬積: 20MHz
電流 - 輸入偏壓: 500µA
電流 - 電源: 5mA
電流 - 輸出 / 通道: 150mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 40 V,±2.25 V ~ 20 V
工作溫度: 0°C ~ 100°C
安裝類型: 通孔
封裝/外殼: TO-220-7 成形引線
供應(yīng)商設(shè)備封裝: TO-220-5
包裝: 管件
其它名稱: LT1010CT-FLOW31
LT1010CT-FLOW31-ND
Q1102103
LT1010
8
1010fe
APPLICATIONS INFORMATION
a ground plane is prudent, especially when operating at
high frequencies.
The buffer slew rate can be reduced by inadequate sup-
ply bypass. With output current changes much above
100mA/s, using 10F solid tantalum capacitors on both
supplies is good practice, although bypassing from the
positive to the negative supply may suffice.
When used in conjunction with an op amp and heavily
loaded (resistive or capacitive), the buffer can couple into
supply leads common to the op amp causing stability
problems with the overall loop and extended settling time.
Adequate bypassing can usually be provided by 10F solid
tantalum capacitors. Alternately, smaller capacitors could
be used with decoupling resistors. Sometimes the op amp
has much better high frequency rejection on one supply,
so bypass requirements are less on this supply.
Power Dissipation
In many applications the LT1010 will require heat sinking.
Thermal resistance, junction to still air is 50°C/W for the
TO-220 package and 100°C/W for the miniDIP package.
Circulating air, a heat sink or mounting the package to
a printed circuit board will reduce thermal resistance.
In DC circuits, buffer dissipation is easily computed. In
AC circuits, signal waveshape and the nature of the load
determine dissipation. Peak dissipation can be several
times average with reactive loads. It is particularly im-
portant to determine dissipation when driving large load
capacitance.
With AC loading, power is divided between the two output
transistors. This reduces the effective thermal resistance,
junction to case is 3°C/W for the TO-220 package as long
as the peak rating of neither output transistor is exceeded.
Thetypicalcurvesindicatethepeakdissipationcapabilities
of one output transistor.
Overload Protection
The LT1010 has both instantaneous current limit and
thermal overload protection. Foldback current limiting has
not been used, enabling the buffer to drive complex loads
without limiting. Because of this, it is capable of power
dissipation in excess of its continuous ratings.
Normally, thermal overload protection will limit dissipa-
tion and prevent damage. However, with more than 30V
across the conducting output transistor, thermal limiting
is not quick enough to ensure protection in current limit.
The thermal protection is effective with 40V across the
conducting output transistor as long as the load current
is otherwise limited to 150mA.
Drive Impedance
Whendrivingcapacitiveloads,theLT1010likestobedriven
from a low source impedance at high frequencies. Certain
low power op amps (e.g., the LM10) are marginal in this
respect. Some care may be required to avoid oscillations,
especially at low temperatures.
Bypassing the buffer input with more than 200pF will solve
the problem. Raising the operating current also works.
Parallel Operation
Parallel operation provides reduced output impedance,
more drive capability and increased frequency response
under load. Any number of buffers can be directly paral-
leled as long as the increased dissipation in individual
units caused by mismatches of output resistance and
offset voltage is taken into account.
When the inputs and outputs of two buffers are connected
together, a current,
IOUT, flows between the outputs:
IOUT =
VOS1– VOS2
ROUT1+ROUT2
where VOS and ROUT are the offset voltage and output
resistance of the respective buffers.
Normally, the negative supply current of one unit will
increase and the other decrease, with the positive supply
current staying the same. The worst-case (VIN → V+)
increase in standby dissipation can be assumed to be
IOUTVT, where VT is the total supply voltage.
Offset voltage is specified worst case over a range of sup-
ply voltages, input voltage and temperature. It would be
unrealistictousetheseworst-casenumbersabovebecause
paralleled units are operating under identical conditions.
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