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參數(shù)資料
| 型號(hào)： | LT1074HVIT7#35 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 8.5 A SWITCHING REGULATOR, 125 kHz SWITCHING FREQ-MAX, PZFM7 |
| 封裝： | PLASTIC, TO-220, 7 PIN |
| 文件頁數(shù)： | 4/17頁 |
| 文件大?。?/td> | 201K |
| 代理商： | LT1074HVIT7#35 |
LT1074/LT1076
12
sn1074 1074fds
Figure 10. Error Amplifier
DESCRIPTIO S
U
PI
U
A
G
fC
at mid frequencies
A
G
R at high frequencies
V
m
C
Vm
C
=
=
2
π
Phase shift from the FB pin to the VC pin is 90° at mid
frequencies where the external CC is controlling gain, then
drops back to 0
° (actually 180° since FB is an inverting
input) when the reactance of CC is small compared to RC.
The low frequency “pole” where the reactance of CC is
equal to the output impedance of Q4 and Q6 (rO), is:
f
rC
rk
POLE
O
=
≈
1
2
400
π
Although fPOLE varies as much as 3:1 due to rO variations,
mid-frequency gain is dependent only on Gm, which is
specified much tighter on the data sheet. The higher
frequency “zero” is determined solely by RC and CC.
f
RC
ZERO
CC
=
1
2
π
The error amplifier has asymmetrical peak output current.
Q3 and Q4 current mirrors are unity-gain, but the Q6
mirror has a gain of 1.8 at output null and a gain of 8 when
the FB pin is high (Q1 current = 0). This results in a
maximum positive output current of 140
A and a maxi-
mum negative (sink) output current of
1.1mA.Theasym-
metry is deliberate—it results in much less regulator
output overshoot during rapid start-up or following the
release of an output overload. Amplifier offset is kept low
by area scaling Q1 and Q2 at 1.8:1.
Amplifier swing is limited by the internal 5.8V supply for
positive outputs and by D1 and D2 when the output goes
low. Low clamp voltage is approximately one diode drop
(
≈0.7V – 2mV/°C).
Note that both the FB pin and the VC pin have other internal
connections. Refer to the frequency shifting and synchro-
nizing discussions.
140 A
Q1
LT1074 PD11
Q2
FB
V
50 A
90 A
Q6
300
C
Q4
5.8V
CC
RC
Q3
50 A
2.21V
EXTERNAL
FREQUENCY
COMPENSATION
90 A
D1
90 A
D2
X1.8
ALL CURRENTS SHOWN ARE AT NULL CONDITION
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