V OUTPUT V+
參數(shù)資料
型號(hào): LT1207CS#TR
廠商: Linear Technology
文件頁(yè)數(shù): 15/16頁(yè)
文件大?。?/td> 0K
描述: IC AMP CURR FEEDBACK DUAL 16SOIC
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 電流反饋
電路數(shù): 2
轉(zhuǎn)換速率: 900 V/µs
-3db帶寬: 60MHz
電流 - 輸入偏壓: 10µA
電壓 - 輸入偏移: 3000µV
電流 - 電源: 20mA
電流 - 輸出 / 通道: 1.2A
電壓 - 電源,單路/雙路(±): 10 V ~ 30 V,±5 V ~ 15 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SO
包裝: 帶卷 (TR)
8
LT1207
SI PLIFIED SCHE ATIC
WW
LT1207 SS
V
OUTPUT
V+
50
D2
D1
V
V+
V
CC
RC
COMP
–IN
+IN
SHUTDOWN
1.25k
TO ALL
CURRENT
SOURCES
Q11
Q15
Q9
Q6
Q5
Q2
Q1
Q18
Q17
Q3
Q4
Q7
Q8
Q12
Q16
Q14
Q13
Q10
1/2 LT1207 CURRENT FEEDBACK AMPLIFIER
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
The LT1207 is a dual current feedback amplifier with high
output current drive capability. The device is stable with
large capacitive loads and can easily supply the high
currents required by capacitive loads. The amplifier will
drive low impedance loads such as cables with excellent
linearity at high frequencies.
Feedback Resistor Selection
The optimum value for the feedback resistors is a function
of the operating conditions of the device, the load imped-
ance and the desired flatness of response. The Typical AC
Performance tables give the values which result in the
highest 0.1dB and 0.5dB bandwidths for various resistive
loads and operating conditions. If this level of flatness is
not required, a higher bandwidth can be obtained by use
of a lower feedback resistor. The characteristic curves of
Bandwidth vs Supply Voltage indicate feedback resistors
for peaking up to 5dB. These curves use a solid line when
the response has less than 0.5dB of peaking and a dashed
line when the response has 0.5dB to 5dB of peaking. The
curves stop where the response has more than 5dB of
peaking.
For resistive loads, the COMP pin should be left open (see
section on capacitive loads).
Capacitive Loads
Each amplifier in the LT1207 includes an optional com-
pensation network for driving capacitive loads. This net-
work eliminates most of the output stage peaking associ-
ated with capacitive loads, allowing the frequency re-
sponse to be flattened. Figure 1 shows the effect of the
network on a 200pF load. Without the optional compensa-
tion, there is a 5dB peak at 40MHz caused by the effect of
the capacitance on the output stage. Adding a 0.01
F
bypass capacitor between the output and the COMP pins
connects the compensation and completely eliminates the
peaking. A lower value feedback resistor can now be used,
resulting in a response which is flat to 0.35dB to 30MHz.
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