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參數(shù)資料
| 型號(hào)： | LT1469CDF-2#PBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 2/12頁(yè) |
| 文件大小： | 0K |
| 描述： | IC OPAMP 16BIT DUAL 200MHZ 12DFN |
| 標(biāo)準(zhǔn)包裝： | 91 |
| 放大器類(lèi)型： | 通用 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 30 V/µs |
| 增益帶寬積： | 200MHz |
| 電流 - 輸入偏壓： | 10nA |
| 電壓 - 輸入偏移： | 100µV |
| 電流 - 電源： | 4.1mA |
| 電流 - 輸出 / 通道： | 22mA |
| 電壓 - 電源，單路/雙路(±)： | ±2.5 V ~ 18 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 12-WFDFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 12-DFN-EP（4x4） |
| 包裝： | 管件 |
LT1469-2
10
14692f
Q10
I5
I2
I1
I4
I6
14692 SS
I3
OUT
Q11
Q8
Q9
Q7
Q6
Q1
–IN
+IN
V+
V–
Q5
Q2
Q4
C
BIAS
Q3
SIMPLIFIED SCHEMATIC
APPLICATIONS INFORMATION
Input Considerations
Each input of the LT1469 is protected with a 100Ω series
resistor and back-to-back diodes across the bases of
the input devices. If large differential input voltages are
anticipated, limit the input current to less than 10mA with
an external series resistor. Each input also has two ESD
clamp diodes—one to each supply. If an input is driven
beyond the supply, limit the current with an external resis-
tor to less than 10mA.
The LT1469 employs bias current cancellation at the inputs.
The inverting input current is trimmed at zero common
mode voltage to minimize errors in inverting applications
such as I-to-V converters. The noninverting input current
is not trimmed and has a wider variation and therefore a
larger maximum value. As the input offset current can be
greater than either input current, the use of balanced source
resistance is NOT recommended as it actually degrades
DC accuracy and also increases noise.
The input bias currents vary with common mode voltage.
The cancellation circuitry was not designed to track this
common mode voltage because the settling time would
have been adversely affected.
The LT1469 inputs can be driven to the negative supply
and to within 0.5V of the positive supply without phase
reversal. As the input moves closer than 0.5V to the posi-
tive supply, the output reverses phase.
Total Input Noise
The total input noise of the LT1469 is optimized for a source
resistance between 1k and 20k. Within this range, the
total input noise is dominated by the noise of the source
resistance itself. When the source resistance is below
1k, voltage noise of the amplier dominates. When the
source resistance is above 20k, the input noise current is
the dominant contributor.
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參數(shù)描述 |
|---|---|
| LT1469CDF-2-TRPBF | 制造商:LINER 制造商全稱(chēng):Linear Technology 功能描述:Dual 200MHz, 30V/μs 16-Bit Accurate AV ≥ 2 Op Amp |
| LT1469CDF-PBF | 制造商:LINER 制造商全稱(chēng):Linear Technology 功能描述:Dual 90MHz, 22V/μs 16-Bit Accurate Operational Amplifi er |
| LT1469CDF-TRPBF | 制造商:LINER 制造商全稱(chēng):Linear Technology 功能描述:Dual 90MHz, 22V/μs 16-Bit Accurate Operational Amplifi er |
| LT1469CN8 | 功能描述:IC OPAMP 16BIT DUAL 90MHZ 8DIP RoHS:否 類(lèi)別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類(lèi)型:J-FET 電路數(shù):2 輸出類(lèi)型:- 轉(zhuǎn)換速率:13 V/µs 增益帶寬積:3MHz -3db帶寬:- 電流 - 輸入偏壓:65pA 電壓 - 輸入偏移:3000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
| LT1469CN8#PBF | 功能描述:IC OPAMP 16BIT DUAL 90MHZ 8DIP RoHS:是 類(lèi)別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類(lèi)型:J-FET 電路數(shù):2 輸出類(lèi)型:- 轉(zhuǎn)換速率:13 V/µs 增益帶寬積:3MHz -3db帶寬:- 電流 - 輸入偏壓:65pA 電壓 - 輸入偏移:3000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
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