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參數(shù)資料
| 型號： | LT1506CR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS |
| 中文描述： | 8.5 A SWITCHING REGULATOR, 560 kHz SWITCHING FREQ-MAX, PSSO7 |
| 封裝： | PLASTIC, D2PAK-7 |
| 文件頁數(shù)： | 23/24頁 |
| 文件大?。?/td> | 417K |
| 代理商： | LT1506CR |
23
LT1506
APPLICATIO
S I
FOR
ATIO
U
Redundant Operation
The circuit shown in Figure 15 is fault tolerant when
operating at less than 8A of output current. If one device
fails, the output will remain in regulation. The feedback
loop will compensate by raising the voltage on the V
C
pin,
increasing switch current of the two remaining devices.
W
U
U
BUCK CONVERTER WITH ADJUSTABLE SOFT START
Large capacitive loads can cause high input currents at
start-up. Figure 16 shows a circuit that limits the dv/dt of
the output at start-up, controlling the capacitor charge
rate. The buck converter is a typical configuration with the
addition of R3, R4, C
SS
and Q1. As the output starts to rise,
Q1 turns on, regulating switch current via the V
C
pin to
maintain a constant dv/dt at the output. Output rise time is
controlled by the current through C
SS
defined by R4 and
Q1’s V
BE
. Once the output is in regulation, Q1 turns off and
the circuit operates normally. R3 is transient protection for
the base of Q1.
RiseTime
R
C
(
V
)
V
SS
OUT
BE
=
(
)(
)(
)
4
Using the values shown in Figure 16,
RiseTime
ms
5
=
=
(
)(
)( )
5
.
–
47 10
15 10
0 7
3
9
The ramp is linear and rise times in the order of 100ms are
possible. Since the circuit is voltage controlled, the ramp
rate is unaffected by load characteristics and maximum
output current is unchanged. Variants of this circuit can be
used for sequencing multiple regulator outputs.
Dual Output SEPIC Converter
The circuit in Figure 17 generates both positive and
negative 5V outputs with a single piece of magnetics. The
two inductors shown are actually just two windings on a
standard B H Electronics inductor. The topology for the 5V
output is a standard buck converter. The –5V topology
would be a simple flyback winding coupled to the buck
converter if C4 were not present. C4 creates a SEPIC
(Single-Ended Primary Inductance Converter) topology
whicn improves regulation and reduces ripple current in
L1. Without C4, the voltage swing on L1B compared to
L1A would vary due to relative loading and coupling
losses. C4 provides a low impedance path to maintain an
equal voltage swing in L1B, improving regulation. In a
flyback converter, during switch on time, all the converter’s
energy is stroed in L1A only, since no current flows in L1B.
At switch off, energy is transferred by magnetic coupling
into L1B, powering the –5V rail. C4 pulls L1B positive
during switch on time, causing current to flow, and energy
to build in L1B and C4. At switch off, the energy stored in
both L1B and C4 supply the –5V rail. This reduces the
current in L1A and changes L1B current waveform from
square to triangular. For details on this circuit see Design
Note 100.
Figure 16. Buck Converter with Adjustable Soft Start
OUTPUT
5V
OUTPUT
–5V
*L1 IS A SINGLE CORE WITH TWO WINDINGS
BH ELECTRONICS #501-0726
**TOKIN IE475ZY5U-C304
IF LOAD CAN GO TO ZERO, AN OPTIONAL
PRELOAD OF 1k TO 5k MAY BE USED TO
IMPROVE LOAD REGULATION
D1, D3: MBRD340
INPUT
6V
TO 15V
GND
1506 F17
C2
0.27
μ
F
C
1.5nF
D1
C1**
100
μ
F
10V TANT
C5**
100
μ
F
10V TANT
C3
10
μ
F
25V
CERAMIC
C4**
4.7
μ
F
D2
1N914
D3
L1*
6.8
μ
H
L1*
R1
5.36k
R2
4.99k
+
+
+
+
BOOST
LT1506
V
IN
V
SW
FB
SHDN
GND
V
C
BOOST
LT1506
V
IN
OUTPUT
5V
4A
INPUT
12V
1506 F16
C2
0.33
μ
F
C1
100
μ
F
C
15nF
C
1.5nF
D1
C3
10
μ
F
D2
1N914
L1
5
μ
H
R1
5.36k
R3
2k
V
SW
FB
SHDN
GND
V
C
+
R2
4.99k
R4
47k
Q1
Figure 17. Dual Output SEPIC Converter
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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