I
參數(shù)資料
型號(hào): LT1970CFE#TRPBF
廠商: Linear Technology
文件頁數(shù): 2/26頁
文件大?。?/td> 0K
描述: IC OPAMP ADJ CURR LIMIT 20-TSSOP
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 通用
電路數(shù): 1
轉(zhuǎn)換速率: 1.6 V/µs
增益帶寬積: 3.6MHz
電流 - 輸入偏壓: 160nA
電壓 - 輸入偏移: 200µV
電流 - 電源: 7mA
電流 - 輸出 / 通道: 800mA
電壓 - 電源,單路/雙路(±): 5 V ~ 36 V,±2.5 V ~ 18 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)裸露焊盤
供應(yīng)商設(shè)備封裝: 20-TSSOP-EP
包裝: 帶卷 (TR)
LT1970
10
1970fc
BLOCK DIAGRAM AND TEST CIRCUIT
APPLICATIONS INFORMATION
3
19
7
9
8
17
16
18
15
12
13
+
+
+
ISINK
1970TC
RFIL
1k
RCS
RLOAD
1k
ISRC
D2
D1
1
Q1
Q2
4
5
6
2
GM1
ENABLE
COMMON
VCSRC
VCSNK
5V
15V
VCSNK
ISRC
ISNK
–IN
VIN
RG
1k
+IN
ENABLE
TSD
14
VCC
V+
15V
–15V
OUT
SENSE+
FILTER
SENSE
V
VEE
1, 10, 11, 20
10k
RFB
1k
VSRC
+
VSNK
+
+
The LT1970 power op amp with precision controllable
current limit is a exible voltage and current source
module. The drawing on the front page of this data sheet
is representative of the basic application of the circuit,
however many alternate uses are possible with proper
understanding of the subcircuit capabilities.
CIRCUIT DESCRIPTION
Main Operational Amplier
Subcircuit block GM1, the 1X unity-gain current buffer
and output transistors Q1 and Q2 form a standard op-
erational amplier. This amplier has ± 500mA current
output capability and a 3.6MHz gain bandwidth product.
Most applications of the LT1970 will use this op amp in
the main signal path. All conventional op amp circuit con-
gurations are supported. Inverting, noninverting, lter,
summation or nonlinear circuits may be implemented in
a conventional manner. The output stage includes current
limiting at ±800mA to protect against fault conditions.
The input stage has high differential breakdown of 36V
minimum between –IN and +IN. No current will ow at
the inputs when differential input voltage is present. This
feature is important when the precision current sense
ampliers “ISINK” and “ISRC” become active.
Current Limit Ampliers
Amplier stages “ISINK” and “ISRC” are very high transcon-
ductance amplier stages with independently controlled
offset voltages. These ampliers monitor the voltage be-
tween input pins SENSE+ and SENSEwhich usually sense
the voltage across a small external current sense resistor.
The transconductance ampliers outputs connect to the
same high impedance node as the main input stage GM1
amplier. Small voltage differences between SENSE+ and
SENSE, smaller than the user set VCSNK/10 and VCSRC/10
in magnitude, cause the current limit ampliers to decouple
from the signal path. This is functionally indicated by diodes
D1 and D2 in the Block Diagram. When the voltage VSENSE
increases in magnitude sufcient to equal or overcome one
of the offset voltages VCSNK/10 or VCSRC/10, the appropri-
ate current limit amplier becomes active and because of
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