and V– to their minimum values for the required output
參數(shù)資料
型號(hào)： LT1970IFE#TR
廠商： Linear Technology
文件頁(yè)數(shù)： 6/26頁(yè)
文件大?。?/td> 0K
描述： IC OPAMP ADJ PREC 500MA 20TSSOP
標(biāo)準(zhǔn)包裝： 2,500
放大器類型： 通用
電路數(shù)： 1
轉(zhuǎn)換速率： 1.6 V/µs
增益帶寬積： 3.6MHz
電流 - 輸入偏壓： 160nA
電壓 - 輸入偏移： 200µV
電流 - 電源： 7mA
電流 - 輸出 / 通道： 800mA
電壓 - 電源，單路/雙路(±)： 5 V ~ 36 V，±2.5 V ~ 18 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）裸露焊盤
供應(yīng)商設(shè)備封裝： 20-TSSOP-EP
包裝： 帶卷 (TR)
LT1970
14
1970fc
and V– to their minimum values for the required output
swing will minimize power dissipation. The supplies VCC
and VEE may also be reduced to a minimal value, but these
supply pins do not carry high currents, and the power
saving is much less. VCC and VEE must be greater than
the maximum output swing by 1.5V or more.
When V– and V+ are provided separately from VCC and VEE,
care must be taken to insure that V– and V+ are always less
than or equal to the main supplies in magnitude. Protec-
tion Schottky diodes may be required to insure this in all
cases, including power on/off transients.
Operation with reduced V+ and V– supplies does not affect
any performance parameters except maximum output
swing. All DC accuracy and AC performance specications
guaranteed with VCC = V+ and VEE = V– are still valid with
the reduced output signal swing range.
Heat Sinking
The power dissipated in the LT1970 die must have a path
to the environment. With 100°C/W thermal resistance in
free air with no heat sink, the package power dissipation
is limited to only 1W. The 20-pin TSSOP package with
exposed copper underside is an efcient heat conductor
if it is effectively mounted on a PC board. Thermal resis-
tances as low as 40°C/W can be obtained by soldering the
bottom of the package to a large copper pattern on the PC
board. For operation at 85°C, this allows up to 1.625W of
power to be dissipated on the LT1970. At 25°C operation,
up to 3.125W of power dissipation can be achieved. The
PC board heat spreading copper area must be connected
to VEE.
Figure 5 shows examples of PCB metal being used for heat
spreading. These are provided as a reference for what might
be expected when using different combinations of metal
area on different layers of a PCB. These examples are with
a 4-layer board using 1oz copper on each layer. The most
effective layers for spreading heat are those closest to the
LT1970 junction. Soldering the exposed thermal pad of the
TSSOP package to the board produces a thermal resistance
from junction-to-case of approximately 3°C/W.
As a minimum, the area directly beneath the package on
all PCB layers can be used for heat spreading. However,
limiting the area to that of the metal heat sinking pad is
APPLICATIONS INFORMATION
not very effective. Expanding the area on various layers
signicantly reduces the overall thermal resistance. The
addition of vias (small 13 mil holes which ll during PCB
plating) connecting all layers of metal also helps reduce
the operating temperature of the LT1970. These are also
shown in Figure 5.
It is important to note that the metal planes used for heat
sinking are connecting electrically to VEE. These planes
must be isolated from any other power planes used in
the PCB design.
Another effective way to control the power amplier operat-
ing temperature is to use airow over the board. Airow
can signicantly reduce the total thermal resistance as
also shown in Figure 5.
DRIVING REACTIVE LOADS
Capacitive Loads
The LT1970 is much more tolerant of capacitive loading
than most operational ampliers. In a worst-case con-
guration as a voltage follower, the circuit is stable for
capacitive loads less than 2.5nF. Higher gain congurations
improve the CLOAD handling. If very large capacitive loads
are to be driven, a resistive decoupling of the amplier
from the capacitive load is effective in maintaining stability
and reducing peaking. The current sense resistor, usually
connected between the output pin and the load can serve
as a part of the decoupling resistance.
Inductive Loads
Load inductance is usually not a problem at the outputs
of operational ampliers, but the LT1970 can be used as a
high output impedance current source. This condition may
be the main operating mode, or when the circuit enters
a protective current limit mode. Just as load capacitance
degrades the phase margin of normal op amps, load
inductance causes a peaking in the loop response of the
feedback controlled current source. The inductive load may
be caused by long lead lengths at the amplier output. If
the amplier will be driving inductive loads or long lead
lengths (greater than 4 inches) a 500pF capacitor from the
SENSE– pin to the ground plane will cancel the inductive
load and ensure stability.
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