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參數(shù)資料
型號(hào): LT6350HDD#PBF
廠商: Linear Technology
文件頁數(shù): 10/28頁
文件大?。?/td> 0K
描述: IC DIFF CONVERT/ADC DRIVER 8-DFN
標(biāo)準(zhǔn)包裝: 121
類型: ADC 驅(qū)動(dòng)器
應(yīng)用: 數(shù)據(jù)采集
安裝類型: 表面貼裝
封裝/外殼: 8-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 8-DFN-EP(3x3)
包裝: 管件
配用: DC1783A-H-ND - BOARD SAR ADC LTC2376-18
DC1783A-G-ND - BOARD SAR ADC LTC2377-18
DC1783A-F-ND - BOARD SAR ADC LTC2378-18
DC1783A-E-ND - BOARD SAR ADC LTC2379-18
DC1783A-D-ND - BOARD SAR ADC LTC2376-16
DC1783A-C-ND - BOARD SAR ADC LTC2377-16
DC1783A-B-ND - BOARD SAR ADC LTC2378-16
DC1783A-A-ND - BOARD SAR ADC LTC2380-16
DC1500A-C-ND - BOARD SAR ADC LTC2391-16
DC1500A-B-ND - BOARD SAR ADC LTC2392-16
LT6350
18
6350fc
For more information www.linear.com/LT6350
+
+–
+
+–
RS
RG
R+IN2
RF
RINT
VOSOUT1
VOSOUT2
VOS1
VOS2
–IN1
+IN1
+IN2
OP AMP 1
OP AMP 2
6350 F07
IB1 +
IOS1
2
IB1 –
IOS1
2
IB2 –
IOS2
2
IB2 +
IOS2
2
Figure 7. Offset Model
applicaTions inForMaTion
In shutdown, all biasing current sources are shut off,
and the output pins, OUT1 and OUT2, each appear as
open collectors with non-linear capacitors in parallel and
steering diodes to either supply. Because of the non-linear
capacitance, the outputs still have the ability to sink and
source small amounts of transient current if driven with
significant voltage transients. The input protection diodes
between +IN1 and +IN2 can still conduct if voltage tran-
sients at the input exceed 700mV. All other inputs also
have ESD protection diodes that can conduct when the
applied voltage exceeds 700mV. Using the SHDN feature
to wire-OR outputs together is not recommended.
The turn-on and turn off times between the shutdown and
active states are typically 400ns.
ESD
The LT6350 has ESD protection diodes on all inputs and
outputs. The diodes are reverse biased during normal
operation. If input pins are driven beyond either supply,
large currents will flow through these diodes. If the current
is transient and limited to 100mA or less, no damage to
the device will occur.
OFFSET CONSIDERATIONS
For excellent offset and distortion performance, both the
common mode and differential mode output voltage off-
sets are trimmed during manufacturing.
Figure 7 shows the contributors to DC offset voltage in
the LT6350.
The resulting DC offset voltages at pin OUT1 and OUT2
can be calculated:
VOSOUT1=VOS1(1+RF/RG)+IB1(RF-RS(1+RF/RG))
– (IOS1/2)(RF+RS(1+RF/RG))
VOSOUT2 = –VOSOUT1 + 2VOS2 + IB2(RINT–2R+IN2)
– (IOS2/2)(RINT + 2R+IN2)
Using the above equations and Equations (2) and (3), the
outputcommonmodeandoutputdifferentialmodeoffsets
can be found. The common mode offset is found to be:
VOSCM = VOS2 + IB2((RINT/2) – R+IN2) – (IOS2/2)
((RINT/2) + R+IN2)
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