- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8614 > LT6350HDD#PBF (Linear Technology)IC DIFF CONVERT/ADC DRIVER 8-DFN PDF資料下載
參數(shù)資料
| 型號： | LT6350HDD#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 13/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DIFF CONVERT/ADC DRIVER 8-DFN |
| 標準包裝： | 121 |
| 類型： | ADC 驅(qū)動器 |
| 應用： | 數(shù)據(jù)采集 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-WFDFN 裸露焊盤 |
| 供應商設備封裝： | 8-DFN-EP（3x3） |
| 包裝： | 管件 |
| 配用： | DC1783A-H-ND - BOARD SAR ADC LTC2376-18 DC1783A-G-ND - BOARD SAR ADC LTC2377-18 DC1783A-F-ND - BOARD SAR ADC LTC2378-18 DC1783A-E-ND - BOARD SAR ADC LTC2379-18 DC1783A-D-ND - BOARD SAR ADC LTC2376-16 DC1783A-C-ND - BOARD SAR ADC LTC2377-16 DC1783A-B-ND - BOARD SAR ADC LTC2378-16 DC1783A-A-ND - BOARD SAR ADC LTC2380-16 DC1500A-C-ND - BOARD SAR ADC LTC2391-16 DC1500A-B-ND - BOARD SAR ADC LTC2392-16 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
LT6350
20
6350fc
For more information www.linear.com/LT6350
applicaTions inForMaTion
RG and RF, will always result in lower output noise at the
expenseofincreaseddistortionduetoincreasedloadingof
op amp 1. Note that op amp 1 is loaded internally by the 1k
input resistor to op amp 2, and therefore external loading
should not be much heavier than 1k to avoid degrading
distortion performance.
When using RF equal to RS (for low offsets) in the gain-
of-two configuration, wideband noise can be substantially
reduced by bypassing across RF. For lowest output noise
always bypass at the +IN2 pin with a capacitor of at least
0.1F as seen in the Typical Application schematic on the
front page. Alternatively, for systems that can tolerate
output voltage offsets, omitting R+IN2 and RF will mini-
mize output noise at the expense of larger output offset
voltage.
Using a single pole passive RC filter network at the output
of the LT6350, as shown in Figure 6, reduces the output
noisebandwidthandtherebyincreasesthesignal-to-noise
ratio of the system. For example, in a typical system with
output signals of 8VP-P,andasignalbandwidthof100kHz,
an RC output filter with RFILT = 100Ω and CDIFF = 6.8nF,
slightly increases the output spot noise from 8.2nV√Hz to
8.4nV√Hz, but will reduce the total integrated noise from
47V (33MHz noise bandwidth) to 3.6V (184kHz noise
bandwidth) and improve the SNR from 96dB to 118dB.
Keep in mind that long RC time constants in the output
filter can increase the settling time at the inputs of the
ADC; incomplete settling can cause gain errors or increase
apparent crosstalk in multiplexed systems.
OUTPUT PHASE BALANCE
The topology of the LT6350 is that of a noninverting stage
followed by an inverting stage. This topology presents
a high impedance single-ended input and provides low
impedance differential outputs. The output of the inverting
buffer, OUT2, is slightly delayed with respect to the output
of the noninverting buffer, OUT1. In the LT6350, the delay
from OUT1 to OUT2 over an input bandwidth from DC to
the differential f–3dB frequency is a nearly constant 6.8ns,
asshowninthegroupdelayplotintheTypicalPerformance
Characteristics section of this data sheet. The delay is
equivalent to a small phase offset from the nominal 180°
phase of the differential outputs. The size of the phase
offset grows with frequency. The phase imbalance causes
a small frequency-dependent common mode component
to appear at the outputs. A practical measure of this effect
can be found in the balance specification, which is defined
to be the change in output common mode level caused by
the presence of an output differential signal:
Balance
≡ ((VOUTDIFF/VIN)/(VOUTCM/VIN))
The balance of the LT6350 at any frequency, f, can be
approximated from the delay, td, between outputs:
Balance (dB)
20 log((4)/(2 π f td))
The approximation is very good from low frequencies up
to frequencies where the balance approaches 20dB, about
10MHz for the LT6350. At DC, the balance is limited by
the matching of the internal resistors that set the gain in
the inverting buffer. 1% matching of the resistors limits
the balance to 52dB at DC. At frequencies near the f–3dB
point of the differential transfer function, additional phase
lag and gain rolloff also contribute to balance. See the
balance plot in the Typical Performance Characteristics
for a detailed picture of Balance vs Input Frequency.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-2TN-IV-F3 | CONVERTER MOD DC/DC 18.5V 150W |
| VI-2TM-MW-B1 | CONVERTER MOD DC/DC 10V 100W |
| VI-2TN-IV-F2 | CONVERTER MOD DC/DC 18.5V 150W |
| VI-2TL-IV-F4 | CONVERTER MOD DC/DC 28V 150W |
| VI-25N-MW-B1 | CONVERTER MOD DC/DC 18.5V 100W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LT6350HDDTRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Low Noise Single-Ended to Differential Converter/ADC Driver |
| LT6350HMS8#PBF | 功能描述:IC DIFF CONVERT/ADC DRIVER 8MSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:可變增益放大器 應用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應商設備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| LT6350HMS8#TRPBF | 功能描述:IC DIFF CONVERT/ADC DRIVER 8MSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:可變增益放大器 應用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應商設備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| LT6350HMS8PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Low Noise Single-Ended to Differential Converter/ADC Driver |
| LT6350HMS8TRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Low Noise Single-Ended to Differential Converter/ADC Driver |
發(fā)布緊急采購，3分鐘左右您將得到回復。