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參數(shù)資料
| 型號(hào)： | LTC1062CSW#TRPBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 13/16頁(yè) |
| 文件大小： | 0K |
| 描述： | IC FILTR 5TH ORDR LOWPASS 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 濾波器類型： | 巴特沃斯，低通開關(guān)電容器 |
| 頻率 - 截止或中心： | 20kHz |
| 濾波器數(shù)： | 1 |
| 濾波器階數(shù)： | 5th |
| 電源電壓： | ±8V，5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
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6
LTC1062
1062fd
Filter Input Voltage Range
Every node of the LTC1062 typically swings within 1V of
either voltage supply, positive or negative. With the appro-
priate external (RC) values, the amplitude response of all
the internal or external nodes does not exceed a gain of
0dB with the exception of Pin 1. The amplitude response
of the feedback node (Pin 1) is shown in Figure 2. For an
input frequency around 0.8 fC, the gain is 1.7V/V and, with
±5V supplies, the peak-to-peak input voltage should not
exceed 4.7V. If the input voltage goes beyond this value,
clipping and distortion of the output waveform occur, but
the filter will not get damaged nor will it oscillate. Also, the
absolute maximum input voltage should not exceed the
power supplies.
Typical Performance Characteristics. The decrease of the
maximum attenuation is due to the rolloff at higher
frequencies of the loop gains of the various internal
feedback paths and not to the increase of the noise floor.
For instance, for a 100kHz clock and 1kHz cutoff fre-
quency, the maximum attenuation is about 64dB. A 4kHz,
1VRMS input signal will be predictably attenuated by 60dB
at the output. A 6kHz, 1VRMS input signal will be attenu-
ated by 64dB and not by 77dB as an ideal 5th order
maximum flat filter would have dictated. The LTC1062
output at 6kHz will be about 630VRMS. The measured
RMS noise from DC to 17kHz was 100VRMS which is
16dB below the filter output.
COSC, Pin 5
The COSC, Pin 5, can be used with an external capacitor,
COSC, connected from Pin 5 to ground. If COSC is polarized
it should be connected from Pin 5 to the negative supply,
Pin 3. COSC lowers the internal oscillator frequency. If
Pin 5 is floating, an internal 33pF capacitor plus the
external interpin capacitance set the oscillator frequency
around 140kHz with ±5V supply. An external COSC will
bring the oscillator frequency down by the ratio (33pF)/
(33pF + COSC). The Typical Performance Characteristics
curves provide the necessary information to get the inter-
nal oscillator frequency for various power supply ranges.
Pin 5 can also be driven with an external CMOS clock to
override the internal oscillator. Although standard 7400
series CMOS gates do not guarantee CMOS levels with the
current source and sink requirements of Pin 5, they will, in
reality, drive the COSC pin. CMOS gates conforming to
standard B series output drive have the appropriate volt-
age levels and more than enough output current to
simultaneously drive several LTC1062 COSC pins. The
typical trip levels of the internal Schmitt trigger which
input is Pin 5, are given in Table 1.
Table 1
VSUPPLY
VTH
+
VTH
–
±2.5V
0.9V
–1V
±5V
1.3V
–2.1V
±6V
1.7V
–2.5V
±7V
1.75V
–2.9V
fIN/fC
0.1
–14
V
PIN1
/V
IN
(dB)
–10
–6
–2
2
110
1062 F02
6
–12
–8
–4
0
4
1
2πRC
=
fC
1.62
VS = ±5V
Figure 2. Amplitude Response of Pin 1
Internal Buffer
The internal buffer out (Pin 8) and Pin 1 are part of the
signal AC path. Excessive capacitive loading will cause
gain errors in the passband, especially around the cutoff
frequency. The internal buffer gain at DC is typically
0.006dB. The internal buffer output can be used as a filter
output, however, it has a few millivolts of DC offset. The
temperature coefficient of the internal buffer is typically
1V/°C.
Filter Attenuation
The LTC1062 rolloff is typically 30dB/octave. When the
clock and the cutoff frequencies increase, the filter’s
maximum attenuation decreases. This is shown in the
APPLICATIO S I FOR ATIO
WU
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