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參數資料
| 型號： | LTC1064CSW#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數： | 20/20頁 |
| 文件大小： | 0K |
| 描述： | IC FILTR BUILDNG BLK QUAD 24SOIC |
| 標準包裝： | 1,000 |
| 濾波器類型： | 通用開關電容器 |
| 頻率 - 截止或中心： | 140kHz |
| 濾波器數： | 4 |
| 濾波器階數： | 8th |
| 電源電壓： | ±2.37 V ~ 8 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 24-SOIC |
| 包裝： | 帶卷 (TR) |
LTC1064
9
1064fb
1064 F07 Eq
fO =
; fn = fO; Q =
;
fCLK
100(50)
fCLK
2
R3
R2
R1
R6
R5 + R6
√
R6
R5 + R6
√
HON1(f→ 0) = HON2 f→
= –
; HOLP = –
;
HOBP = –
; R5
R6 ≤ 5k
R3
R1
()
R6
R5 + R6
R2
R1
–
+
∫
LP
+ Σ
AGND
NS
–
BP
R1
R2
VIN
R3
1064 F07
R6
R5
1/4 LTC1064
1064 F06 Eq
NOTE: THE 50:1 EQUATIONS FOR MODE 3 ARE DIFFERENT FROM THE EQUATIONS
FOR MODE 3 OPERATIONS OF THE LTC1059, LTC1060 AND LTC1061. START WITH
fO, CALCULATE R2/R4, SET R4; FROM THE Q VALUE, CALCULATE R3:
fO =
; Q =
; HOHP = –
;
fCLK
100
R2
R4
R3
R2
R4
R2
R1
MODE 3 (100:1):
√
HOBP = –
; HOLP = –
R3
R1
R4
R1
fO =
; Q =
;
fCLK
50
R2
R4
MODE 3 (50:1):
√
R2
R3
R2
16R4
R2
R4
1.005
√
–
R3 =
; THEN CALCULATE R1 TO SET
THE DESIRED GAIN.
+
R2
1.005
Q
√R2
R4
R2
16R4
R3
R1
HOHP = –
; HOBP = –
; HOLP = –
R2
R1
R3
16R4
1 –
R4
R1
–
+
∫
LP
+ Σ
AGND
HP
S
1/4 LTC1064
–
BP
R1
R2
VIN
R3
R4
1064 F06
CC
Mode 3
Mode 3 is the second of the primary modes. In Mode 3, the
ratio of the external clock frequency to the center fre-
quency of each 2nd order section can be adjusted above or
below 50:1 or 100:1. Side D of the LTC1064 can only be
connected in Mode 3. Figure 6 illustrates Mode 3, the
classical state variable configuration, providing highpass,
bandpass and lowpass 2nd order filter functions. Mode 3
is slower than Mode 1. Mode 3 can be used to make high
order all-pole bandpass, lowpass, highpass and notch
filters.
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case. This was done to provide
speed without penalizing the noise performance.
SECONDARY MODES
Mode 1b
Mode 1b is derived from Mode 1. In Mode 1b, Figure 7, two
additional resistors R5 and R6 are added to alternate the
amount of voltage fed back from the lowpass output into
the input of the SA (or SB or SC) switched-capacitor
summer. This allows the filter’s clock-to-center frequency
ratio to be adjusted beyond 50:1 or 100:1. Mode 1b
maintains the speed advantages of Mode 1.
Mode 2
Mode 2 is a combination of Mode 1 and Mode 3, as shown
in Figure 8. With Mode 2, the clock-to-center frequency
ratio fCLK/fO is always less than 50:1 or 100:1. The
advantage of Mode 2 is that it provides less sensitivity to
resistor tolerances than does Mode 3. As in Mode 1,
Mode 2 has a notch output which depends on the clock
frequency and the notch frequency is therefore less than
the center frequency fO.
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case.
ODES OF OPERATIO
U
W
Figure 6. Mode 3: 2nd Order Filter Providing Highpass,
Bandpass and Lowpass
Figure 7. Mode 1b: 2nd Order Filter Providing Notch,
Bandpass and Lowpass
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