參數(shù)資料
型號(hào): LTC1094ACN
廠商: Linear Technology
文件頁數(shù): 28/32頁
文件大小: 0K
描述: IC DATA ACQ SYS 10BIT 8CH 20-DIP
標(biāo)準(zhǔn)包裝: 18
類型: 數(shù)據(jù)采集系統(tǒng)(DAS),ADC
分辨率(位): 10 b
數(shù)據(jù)接口: 串行
電壓電源: 雙 ±
電源電壓: ±5V,4.5V,10V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 20-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 20-PDIP
包裝: 管件
5
LTC1091/LTC1092
LTC1093/LTC1094
Change in Full-Scale Error vs
Temperature
AMBIENT TEMPERATURE (
°C)
–50
MAGNITUDE
OF
OFFSET
CHANGE
(LSB)
0.6
0.5
0.4
0.3
0.2
0.1
0
50
1091/2/3/4 G01
–25
0
25
75
125
100
VCC (VREF) = 5V
fCLK = 500kHz
Change in Offset Error vs
Temperature
AMBIENT TEMPERATURE (
°C)
–50
MAGNITUDE
OF
FULL-SCALE
CHANGE
(LSB)
0.6
0.5
0.4
0.3
0.2
0.1
0
50
1091/2/3/4 G03
–25
0
25
75
125
100
VCC (VREF) = 5V
fCLK = 500kHz
AMBIENT TEMPERATURE (
°C)
–50
MAGNITUDE
OF
LINEARITY
CHANGE
(LSB)
0.6
0.5
0.4
0.3
0.2
0.1
0
50
1091/2/3/4 G02
–25
0
25
75
125
100
VCC (VREF) = 5V
fCLK = 500kHz
Change in Linearity Error vs
Temperature
AMBIENT TEMPERATURE (
°C)
–50
D
OUT
DELAY
TIME
FROM
SCLK
(ns)
600
500
400
300
200
100
0
50
1091/2/3/4 G05
–25
0
25
75
125
100
VCC = 5V
MSB-FIRST DATA
LSB-FIRST DATA
Digital Input Logic Threshold vs
Supply Voltage
DOUT Delay Time vs Temperature
DOUT Delay Time vs
Supply Voltage
SUPPLY VOLTAGE (V)
4
5
67
8
1091/2/3/4 G06
910
TA = 25°C
D
OUT
DELAY
TIME
FROM
SCLK
(ns)
600
500
400
300
200
100
0
MSB-FIRST DATA
LSB-FIRST DATA
SUPPLY VOLTAGE (V)
4
LOGIC
THRESHOLD
(V)
4
3
2
1
0
5
67
8
1091/2/3/4 G04
910
TA = 25°C
Maximum Clock Rate vs
Temperature
AMBIENT TEMPERATURE (
°C)
–50
MAXIMUM
CLK
FREQUENCY*
(MHz)
3.0
2.5
2.0
1.5
1.0
0.5
0
50
1091/2/3/4 G07
–25
0
25
75
125
100
VCC = 5V
Maximum Clock Rate vs
Supply Voltage
AMBIENT TEMPERATURE (
°C)
–50
MINIMUM
CLK
FREQUENCY**
(MHz)
0.3
0.25
0.20
0.15
0.10
0.05
0
50
1091/2/3/4 G09
–25
0
25
75
125
100
VCC = 5V
Minimum Clock Rate vs
Temperature
SUPPLY VOLTAGE (V)
4
5
67
8
1091/2/3/4 G08
910
TA = 25°C
MAXIMUM
CLK
FREQUENCY*
(MHz)
3.0
2.5
2.0
1.5
1.0
0.5
0
*MAXIMUM CLK FREQUENCY REPRESENTS THE HIGHEST FREQUENCY AT WHICH CLK CAN
BE OPERATED (WITH 50% DUTY CYCLE) WHILE STILL PROVIDING 100ns SETUP TIME FOR
THE DEVICE RECEIVING THE DOUT DATA.
**AS THE CLK FREQUENCY IS DECREASED FROM 500kHz, MINIMUM CLK FREQUENCY
(
ERROR ≤ 0.1LSB) REPRESENTS THE FREQUENCY AT WHICH A 0.1LSB SHIFT IN ANY
CODE TRANSITION FROM ITS 500kHz VALUE IS FIRST DETECTED.
CC
HARA TERISTICS
UW
A
TYPICALPERFOR
CE
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