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參數(shù)資料
| 型號(hào)： | LTC1279C |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 12-Bit, 600ksps Sampling A/D Converter with Shutdown |
| 中文描述： | 12位，600ksps與關(guān)機(jī)采樣A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 327K |
| 代理商： | LTC1279C |
8
LTC1279
TEST CIR
Load Circuits for Output Float Delay
Load Circuits for Access Timing
3k
C
L
DBN
DGND
A) HIGH-Z TO V
OH
(t
8
)
AND V
OL
TO V
OH
(t
6
)
C
L
DBN
3k
5V
B) HIGH-Z TO V
OL
(t
8
)
AND V
OH
TO V
OL
(t
6
)
DGND
1279 TC01
3k
10pF
DBN
DGND
A) V
OH
TO HIGH-Z
10pF
DBN
3k
5V
B) V
OL
TO HIGH-Z
DGND
1279 TC02
CS to RD Setup Timing
SHDN to CONVST Wake-Up Timing
CS to CONVST Setup Timing
TW U
W
APPLICATIO
S I
FOR
ATIO
U
CONVERSION DETAILS
The LTC1279 uses a successive approximation algorithm
and an internal sample-and-hold circuit to convert an
analog signal to a 12-bit parallel output. The ADC is
complete with a precision reference and an internal clock.
The control logic provides easy interface to microproces-
sors and DSPs. (Please refer to the Digital Interface
section for the data format.)
Conversion start is controlled by the CS and CONVST
inputs. At the start of conversion the successive approxi-
mation register (SAR) is reset. Once a conversion cycle
has begun it cannot be restarted.
During conversion, the internal 12-bit capacitive DAC
output is sequenced by the SAR from the most significant
bit (MSB) to the least significant bit (LSB). Referring to
Figure 1, the A
IN
input connects to the sample-and-hold
capacitor during the acquire phase, and the comparator
offset is nulled by the feedback switch. In this acquire
phase, a minimum delay of 160ns will provide enough
W
U
U
V
DAC
1279 F01
+
–
COMPAR-
ATOR
C
DAC
DAC
SAMPLE
HOLD
C
SAMPLE
S
A
R
12-BIT
LATCH
SAMPLE
SI
A
IN
Figure 1. A
IN
Input
t
3
SHDN
CONVST
1279 TD03
t
1
CS
RD
1279 TD01
t
2
CS
CONVST
1279 TD02
time for the sample-and-hold capacitor to acquire the
analog signal. During the convert phase, the comparator
feedback switch opens, putting the comparator into the
compare mode. The input switch switches C
SAMPLE
to
ground, injecting the analog input charge onto the sum-
ming junction. This input charge is successively com-
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| LTC1279ISW | 12-Bit, 600ksps Sampling A/D Converter with Shutdown |
| LTC1279CSW | 12-Bit, 600ksps Sampling A/D Converter with Shutdown |
| LTC1279I | 12-Bit, 600ksps Sampling A/D Converter with Shutdown |
| LTC1279 | 12-Bit, 600ksps，Sampling A/D Converters with Shutdown(600ksps，12位采樣A/D轉(zhuǎn)換器（帶關(guān)斷）) |
| LTC1282AC | 3V 140ksps 12-Bit Sampling A/D Converter with Reference |
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