specified at 3.3V. The output DOUT is" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� LTC1287CCN8
寤犲晢锛� Linear Technology
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 15/16闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC DATA ACQ SYS 12BIT 3V 8-DIP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 50
椤炲瀷锛� 鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)锛圖AS锛�
鍒嗚鲸鐜囷紙浣嶏級锛� 12 b
閲囨ǎ鐜囷紙姣忕锛夛細 30k
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 涓茶锛屽苟鑱�(li谩n)
闆诲闆绘簮锛� 鍠浕婧�
闆绘簮闆诲锛� 3V
宸ヤ綔婧害锛� 0°C ~ 70°C
瀹夎椤炲瀷锛� 閫氬瓟
灏佽/澶栨锛� 8-DIP锛�0.300"锛�7.62mm锛�
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-PDIP
鍖呰锛� 绠′欢
8
LTC1287
1287fa
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
specified at 3.3V. The output DOUT is also compatible with
the above standards. The following summarizes such
levels.
VOH (no load)
VCC 鈥� 0.1V
VOL (no load)
0.1V
VOH
0.9
脳 VCC
VOL
0.1
脳 VCC
VIH
0.7
脳 VCC
VIL
0.2
脳 VCC
The LTC1287 can be driven with 5V logic even when VCC
is at 3.3V. This is due to a unique input protection device
that is found on the LTC1287.
Microprocessor Interfaces
The LTC1287 can interface directly (without external hard-
ware) to most popular microprocessor (MPU) synchro-
nous serial formats. If an MPU without a serial interface is
used, then three of the MPU鈥檚 parallel port lines can be
programmed to form the serial link to the LTC1287. Many
of the popular MPUs can operate with 3V supplies. For
example the MC68HC11 is an MPU with a serial format
(SPI). Likewise parallel MPUs that have the 8051 type
architecture are also capable of operating at this voltage
range. The code for these processors remains the same
and can be found in the LTC1292 data sheet.
Sharing the Serial Interface
The LTC1287 can share the same two-wire serial interface
with other peripheral components or other LTC1287s
(Figure 2). In this case, the CS signals decide which
LTC1287 is being addressed by the MPU.
Figure 2. Several LTC1287s Sharing One 2-Wire Serial Interface
Figure 3. Example Ground Plane for the LTC1287
LTC1287
2 CHANNELS
CS
2
2-WIRE SERIAL
INTERFACE TO OTHER
PERIPHERALS OR LTC1287s
2
10
OUTPUT PORT
SERIAL DATA
MPU
LTC1287 F02
LTC1287
1
2
3
4
5
6
7
8
LTC1287
22
F TANTALUM
VCC
LTC1287 F03
0.1
F
ANALOG CONSIDERATIONS
Grounding
The LTC1287 should be used with an analog ground plane
and single point grounding techniques. Do not use wire
wrapping techniques to breadboard and evaluate the device.
To achieve the optimum performance use a PC board. The
ground pin (Pin 4) should be tied directly to the ground
plane with minimum lead length (a low profile socket is
fine). Pin 7 (VCC) should be bypassed to the ground plane
with a 22
F (minimum value) tantalum with leads as short
as possible and as close as possible to the pin. A 0.1
F
ceramic disk also should be placed in parallel with the
22
Fandagainwithleadsasshortaspossibleandasclose
to VCC as possible. Figure 3 shows an example of an ideal
LTC1287 ground plane design for a two-sided board. Of
course this much ground plane will not always be possible,
but users should strive to get as close to this ideal as
possible.
Bypassing
For good performance, VCC must be free of noise and
ripple. Any changes in the VCC voltage with respect to
ground during a conversion cycle can induce errors or
noise in the output code. VCC noise and ripple can be kept
below 0.5mV by bypassing the VCC pin directly to the
analog plane with a minimum of 22
F tantalum capacitor
and with leads as short as possible. The lead from the
device to the VCC supply also should be kept to a minimum
and the VCC supply should have a low output impedance
鐩搁棞(gu膩n)PDF璩囨枡
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鍙冩暩(sh霉)鎻忚堪
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LTC1288CS8 鍔熻兘鎻忚堪:IC A/D CONV SAMPLING 12BIT 8SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:- 妯�(bi膩o)婧�(zh菙n)鍖呰:1,000 绯诲垪:- 浣嶆暩(sh霉):16 閲囨ǎ鐜囷紙姣忕锛�:45k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:涓茶 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:2 鍔熺巼鑰楁暎锛堟渶澶э級:315mW 闆诲闆绘簮:妯℃摤鍜屾暩(sh霉)瀛� 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:28-SOIC锛�0.295"锛�7.50mm 瀵級 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:28-SOIC W 鍖呰:甯跺嵎 (TR) 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:2 鍊�(g猫)鍠锛屽柈妤�