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參數(shù)資料
| 型號： | LTC1553CG |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 5-Bit Programmable Synchronous Switching Regulator Controller for Pentium II Processor |
| 中文描述： | 19 A SWITCHING CONTROLLER, 350 kHz SWITCHING FREQ-MAX, PDSO20 |
| 封裝： | 0.209 INCH, PLASTIC, SSOP-20 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大?。?/td> | 399K |
| 代理商： | LTC1553CG |
14
LTC1553
APPLICATIO
S I
FOR
ATIO
U
The LTC1553 designs that use a 5V V
IN
voltage and a
doubler charge pump to generate PV
CC
will not provide
enough drive voltage to fully enhance standard power
MOSFETs. Under this condition, the effective MOSFET
R
DS(ON)
may be quite high, raising the dissipation in the
FETs and reducing efficiency. Logic level FETs are a better
choice for 5V-only systems as shown in Figure 7 or 12V
input systems using the 17V charge pump of Figure 9.
They can be fully enhanced with the generated charge
pump voltage and will operate at maximum efficiency.
Note that doubler charge pump designs running from
supplies higher than 5V, and all tripler charge pump
designs, should include a Zener clamp diode at PV
CC
to
prevent transients from exceeding the absolute maximum
rating at that pin. See the MOSFET Gate Drive section for
more charge pump information.
Once the threshold voltage has been selected, R
DS(ON)
should be chosen based on input and output voltage,
allowable power dissipation and maximum required out-
put current. In a typical LTC1553 buck converter circuit
the average inductor current is equal to the output load
current. This current is always flowing through either Q1
or Q2 with the power dissipation split up according to the
duty cycle:
( )
=
(
W
U
U
P
MAX
should be calculated based primarily on required
efficiency or allowable thermal dissipation. A typical high
efficiency circuit designed for Pentium II with a 5V input
and a 2.8V, 11.2A output might allow no more than 4%
efficiency loss at full load for each MOSFET. Assuming
roughly 90% efficiency at this current level, this gives a
P
MAX
value of:
[(2.8)(11.2A/0.9)(0.04)] = 1.39W per FET
and a required R
DS(ON)
of:
R
V
W
V
( )(
A
R
V
W
V
V
A
DS ON Q
DS ON Q
=
( )(
(
)
)
)(
5
=
=
)
(
)(
)
=
1
2
2
2
5
1 39
2 8
11 2
0 019
1 39
5
2 8
11 2
0 025
Note also that while the required R
DS(ON)
values suggest
large MOSFETs, the dissipation numbers are only 1.39W
per device or less––large TO-220 packages and heat sinks
are not necessarily required in high efficiency applica-
tions. Siliconix Si4410DY or International Rectifier IRF7413
(both in SO-8) or Siliconix SUD50N03 or Motorola
MTD20N03HDL (both in D PAK) are small footprint sur-
face mount devices with R
DS(ON)
values below 0.03
at 5V
of gate drive that work well in LTC1553 circuits. With
higher output voltages, the R
DS(ON)
of Q1 may need to be
significantly lower than that for Q2. These conditions can
often be met by paralleling two MOSFETs for Q1 and using
a single device for Q2. Note that using a higher P
MAX
value
in the R
DS(ON)
calculations will generally decrease MOSFET
cost and circuit efficiency while increasing MOSFET heat
sink requirements.
DC Q
V
V
DC Q
V
V
V
V
V
OUT
IN
OUT
IN
IN
OUT
IN
1
2
1
( )
=
=
)
The R
DS(ON)
required for a given conduction loss can now
be calculated by rearranging the relation P = I
2
R.
R
P
( )
DC Q
[
I
V
(
P
V
I
R
P
( )
DC Q
[
I
V
P
V
V
I
DS ON Q
MAX Q
]
(
MAX
IN
MAX Q
)(
OUT
( )
MAX
DS ON Q
MAX Q
MAX
IN
MAX Q
)(
IN
OUT
MAX
]
(
=
)
=
( )
)
=
)
=
(
)
1
1
2
1
2
2
2
2
2
2
1
2
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