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參數(shù)資料
| 型號： | LTC1553LCSW |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 5-Bit Programmable Synchronous Switching Regulator Controller for Pentium II Processor |
| 中文描述： | SWITCHING CONTROLLER, 350 kHz SWITCHING FREQ-MAX, PDSO20 |
| 封裝： | 0.300 INCH, PLASTIC, SO-20 |
| 文件頁數(shù)： | 18/20頁 |
| 文件大?。?/td> | 370K |
| 代理商： | LTC1553LCSW |
18
LTC1553L
APPLICATIO
S I
N
FOR
ATIO
U
ground plane at a single point, preferably at a fairly quiet
point in the circuit such as close to the output capaci-
tors. This is not always practical, however, due to
physical constraints. Another reasonably good point to
make this connection is between the output capacitors
and the source connection of the low side FET Q2. Do
not tie this single point ground in the trace run between
the low side FET source and the input capacitor ground,
as this area of the ground plane will be very noisy.
3. The small signal resistors and capacitors for frequency
compensation and soft start should be located very
close to their respective pins and the ground ends
connected to the signal ground pin through a separate
trace. Do not connect these parts to the ground plane!
4. The V
CC
and PV
CC
decoupling capacitors should be as
close to the LTC1553L as possible. The 10
μ
F bypass
W
U
capacitors shown at V
CC
and PV
CC
will help provide
optimum regulation performance.
5. The (+) plate of C
IN
should be connected as close as
possible to the drain of the upper MOSFET. An addi-
tional 1
μ
F ceramic capacitor between V
IN
and power
ground is recommended.
6. The SENSE pin is very sensitive to pickup from the
switching node. Care should be taken to isolate SENSE
from possible capacitive coupling to the inductor switch-
ing signal. A 0.1
μ
F is required between the SENSE pin
and the SGND pin next to the LTC1553L.
7. OUTEN is a high impedance input and should be
externally pulled up to a logic HIGH for normal
operation.
8. Kelvin sense I
MAX
and I
FB
at Q1 drain and source pins.
Figure 10. LTC1553L Layout Diagram
10
μ
F
10
μ
F
5.6k
1153L F10
0.1
μ
F
SGND
G1
OUTEN
VID0
VID1
VID2
VID3
VID4
20
19
18
17
16
15
14
13
12
11
G2
PV
CC
V
CC
SENSE
0.1
μ
F
+
+
V
OUT
L
O
PV
CC
R
C
R
IMAX
BOLD LINES INDICATE
HIGH CURRENT PATHS
C
C
C1
C
SS
C
OUT
Q1
Q2
+
C
IN
V
IN
5.6k
5.6k
LTC1553L
R
IFB
+
3
1
2
4
5
6
7
8
9
10
I
MAX
I
FB
SS
COMP
VID0
VID1
VID2
VID3
VID4
PWRGD
FAULT
OT
0.1
μ
F
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