The data on the DIN input is loaded into the shif" />
參數資料
型號: LTC1658CMS8#PBF
廠商: Linear Technology
文件頁數: 10/12頁
文件大?。?/td> 0K
描述: IC D/A CONV 14BIT R-R 8-MSOP
標準包裝: 50
設置時間: 12µs
位數: 14
數據接口: 串行
轉換器數目: 1
電壓電源: 單電源
功率耗散(最大): 3mW
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 8-MSOP
包裝: 管件
輸出數目和類型: 1 電壓,單極
采樣率(每秒): *
產品目錄頁面: 1350 (CN2011-ZH PDF)
7
LTC1658
OPERATIO
U
Serial Interface
The data on the DIN input is loaded into the shift register
on the rising edge of the clock. The MSB is loaded first. The
DAC register loads the data from the shift register when
CS/LD is pulled high. The clock is disabled internally when
CS/LD is high. Note: CLK must be low before CS/LD is
pulled low to avoid an extra internal clock pulse. The input
word must be 16 bits wide. The last two bits are don’t
cares.
The buffered output of the 16-bit shift register is available
on the DOUT pin which swings from GND to VCC.
Multiple LTC1658s may be daisy-chained together by
connecting the DOUT pin to the DIN pin of the next chip
while the clock and CS/LD signals remain common to all
chips in the daisy chain. The serial data is clocked to all of
the chips then the CS/LD signal is pulled high to update all
of them simultaneously.
Voltage Output
The LTC1658 rail-to-rail buffered output can source or sink
5mA over the entire operating temperature range while
pulling to within 400mV of the positive supply voltage or
ground. The output swings to within a few millivolts of ei-
ther supply rail when unloaded and has an equivalent out-
put resistance of 40
,at5VVCC,whendrivingaloadtothe
rails. The output can drive 1000pF without going into os-
cillation.
The output swings from 0V to the voltage at the REF pin,
i.e., there is a gain of 1 from REF to VOUT. Please note, if
REF is tied to VCC the output can only swing to (VCC – VOS).
See Applications Information.
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