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參數(shù)資料
| 型號： | LTC1659IS8#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC D/A CONV 12BIT R-R 8-SOIC |
| 標準包裝： | 100 |
| 設(shè)置時間： | 14µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 720µW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電壓，單極 |
| 采樣率（每秒）： | * |
| 產(chǎn)品目錄頁面： | 1350 (CN2011-ZH PDF) |
LTC1659
7
1659fa
TIMING DIAGRAM
DEFINITIONS
B11
MSB
B10
t1
t9
B1
t6
B0
LSB
B11
CURRENT WORD
t7
t2
t4
t3
t8
CLK
DIN
DOUT
CS/LD
t5
1659 TD
B0
PREVIOUS WORD
B11
PREVIOUS WORD
B10
B1
B0
Differential Nonlinearity (DNL): The difference between
the measured change and the ideal 1LSB change for any
two adjacent codes. The DNL error between any two codes
is calculated as follows:
DNL = (
ΔVOUT – LSB)/LSB
where
ΔVOUT is the measured voltage difference between
two adjacent codes.
Digital Feedthrough: The glitch that appears at the ana-
log output caused by AC coupling from the digital inputs
when they change state. The area of the glitch is specied
in (nV)(sec).
Full-Scale Error (FSE): The deviation of the actual full-scale
voltage from ideal. FSE includes the effects of offset and
gain errors (see Applications Information).
Integral Nonlinearity (INL): The deviation from a straight
line passing through the endpoints of the DAC transfer
curve (Endpoint INL). Because the output cannot go
below zero, the linearity is measured between full scale
and the lowest code which guarantees the output will be
greater than zero. The INL error at a given input code is
calculated as follows:
INL = [VOUT – VOS – (VFS – VOS)(code/4095)]/LSB
where VOUT is the output voltage of the DAC measured at
the given input code.
Least Signicant Bit (LSB): The ideal voltage difference
between two successive codes.
LSB = VREF/4096
Resolution (n): Denes the number of DAC output states
(2n) that divide the full-scale range. Resolution does not
imply linearity.
Voltage Offset Error (VOS): Nominally, the voltage at the
output when the DAC is loaded with all zeros. A single
supply DAC can have a true negative offset, but the output
cannot go below zero (see Applications Information).
For this reason, single supply DAC offset is measured at
the lowest code that guarantees the output will be greater
than zero.
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