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參數(shù)資料
| 型號： | LTC1700 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Quadruple 2-Input Exclusive-OR Gates 14-SO 0 to 70 |
| 中文描述： | 無檢測電阻同步升壓型DC / DC控制器 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 194K |
| 代理商： | LTC1700 |
LTC1700
13
where:
V
D
= Voltage drop of P-channel parasitic diode
I
OUT
= Initial load current during start-up
C
OUT
= Output capacitance
Hence you would select the start-up capacitor, C
SS
, to
ensure t
DELAY
> t
POWERUP.
Remember that the above
equation is only valid for V
IN
< 2.3V. If V
IN
is greater than
2.3V, then t
POWERUP
= 0ns.
Design Example
Assume the LTC1700 is used to convert a 3.3V input to 5V
output. Load current requirement is a maximum 3A and a
minimum of 100mA. Efficiency at both low and high load
currents is important. Ambient temperature = 25
°
C.
Since low load current efficiency is important, Burst Mode
operation is enabled by connecting pin 5 to V
OUT
.
Duty Cycle = 1 – V
IN
/V
OUT
= 0.34
Since the duty cycle is less than 36%, the value of the
inductor is chosen based on the L
MINBURST
equation.
L
MINBURST
= 0.8
μ
H.
In the application, (Figure 7) a 4.6
μ
H inductor is used to
further reduce ripple current. The actual ripple current is
now:
I
V
kHz
H
A
L
=
μ
=
)
3 3
.
0 34
.
530
4 6
0 46
.
For the main N-channel MOSFET, the R
DS(ON)
should be:
R
mV
I
D
I
m
DS ON N CHANNEL
(
)(
O MAX
(
–
1
L
)
)
0. (
)
.
=
+
=
63
13 2
Accounting for the peak current reduction due to slope
compensation (see Figure 5), the R
DS(ON)
of the N-channel
should be:
R
DS(ON)
= (13.2)(0.9)
= 11.9m
The factor, 0.9, is obtained from Figure 5 using a duty cycle
of 34%. The peak current of the inductor is 5A. Select an
inductor that does not saturate at this current level. The
average current through the N-channel MOSFET is 1.62A
while the average current through the synchronous P-
channel MOSFET is 3A.
The FDS6670A and FDS6375 are chosen for the
N-channel and P-channel MOSFET respectively. We can
now calculate the temperature rise in the FDS6670A. RMS
current flowing through the FDS6670A is 2.78A. Hence
power dissipated is:
P
DISS
= (2.78)
2
(8
×
10
–3
)
= 61.82mW
The
θ
JA
of the FDS6670A is 50
°
C/W. Therefore tempera-
ture rise is:
T
RISE
= 61.82mW
×
50
= 3.1
°
C
This is an insignificant temperature rise and therefore the
omission of the
ρ
T in calculating the required R
DS(ON)
does not generate a large error.
At 3A load, the RMS current into the output capacitor is
given by:
I
COUT(RMS)
= 3(5/3.3 – 1)
0.5
= 2.15A
To meet the RMS current requirement, two SANYO POSCAP
100
μ
F capacitors are paralleled. These capacitors have
low ESR (55m
) and to futher reduce the overall ESR, a
10
μ
F ceramic capacitor is placed in parallel with the
POSCAP capacitor. Figure 7 shows the complete circuit.
APPLICATIO
S I
FOR
ATIO
U
W
U
U
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