參數(shù)資料
型號(hào): LTC1773
廠商: Linear Technology Corporation
英文描述: Synchronous Step-Down Regulator Controller(同步步降穩(wěn)壓器)
中文描述: 同步降壓穩(wěn)壓控制器(同步步降穩(wěn)壓器)
文件頁(yè)數(shù): 5/20頁(yè)
文件大小: 274K
代理商: LTC1773
LTC1773
5
I
TH
(Pin 1):
Error Amplifier Compensation Point. The
current comparator threshold increases with this control
voltage. Nominal voltage range for this pin is 0V to 1.2V.
Under high duty cycle and nearing current limit, I
TH
can
swing up to 2.4V.
RUN/SS (Pin 2):
Combination of Soft Start and Run
Control Inputs. A capacitor to ground at this pin sets the
ramp time to full current output. The time is approximately
0.8s/
μ
F. Forcing this pin below 0.4V shuts down all the
circuitry.
SYNC/FCB (Pin 3):
Multifunction Pin. This pin performs
three functions: 1) secondary winding feedback input, 2)
external clock synchronization and 3) Burst Mode opera-
tion or forced continuous mode select. For secondary
winding applications, connect to a resistive divider from
the secondary output. To synchronize with an external
clock, apply a TTL/CMOS compatible clock with a fre-
quency between 585kHz and 750kHz. To select Burst
Mode operation, tie SYNC/FCB to V
IN
. Grounding this pin
forces continuous operation.
PI
FU
CTIO
N
S
U
U
V
FB
(Pin 4):
Feedback Pin. Receives the feedback voltage
from an external resistive divider across the output. Do not
use more than 0.01
μ
F of feedforward capacitance from FB
to the output.
GND (Pin 5):
Ground Pin.
BG (Pin 6):
Bottom Gate Driver of External N-Channel
Power MOSFET. This pin swings from 0V to V
IN
.
TG (Pin 7):
Top Gate Driver of External P-Channel Power
MOSFET. This pin swings from 0V to V
IN
.
V
IN
(Pin 8) :
Main Supply Pin. Must be closely decoupled
to GND (pin 5).
SENSE
(Pin 9):
The Negative Input to the Current Com-
parator. A sense resistor between this pin and V
IN
sets the
peak current in the top switch. Connect this pin to the
source of the external P-Channel power MOSFET.
SW (Pin 10):
Switch Node Connection to Inductor. This
pin connects to the drains of the external main and
synchronous power MOSFET switches.
FU
CTIO
AL DIAGRW
U
U
+
RUN/SOFT
SOFT-START
BURST
DEFEAT
FREQ
SHIFT
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
UVLO
TRIP = 2.5V
+
4
3
2
1
+
+
+
+
+
SYNC/FCB
X
Y
OSC
I
TH
V
FB
S
Q
R
Q
0.22V
0.6V
0.8V REF
ANTI
SHOOT-THRU
6
10
5
7
8
9
SLOPE
COMP
+
0.8V
0.86V
0.4
μ
A
SHUTDOWN
RUN/SS
1.5
μ
A
EA
OVDET
FCB
I
RCMP
I
COMP
50mV
0.4V
GND
SW
BG
TG
V
IN
SENSE–
SLEEP
BURST
COMP
EN
1773 FD
Y = “0” ONLY WHEN X IS A CONSTANT “1”
0.8V
SYNC
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