參數(shù)資料
型號: LTC2141IUP-14#PBF
廠商: Linear Technology
文件頁數(shù): 1/38頁
文件大?。?/td> 0K
描述: IC ADC DUAL 14BIT 40 MSPS 64-QFN
標準包裝: 40
位數(shù): 14
采樣率(每秒): 40M
數(shù)據(jù)接口: 并聯(lián),串行,SPI
轉換器數(shù)目: 2
功率耗散(最大): 218mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-WFQFN 裸露焊盤
供應商設備封裝: 64-QFN(9x9)
包裝: 管件
輸入數(shù)目和類型: 2 個差分
配用: DC890B-ND - BOARD USB DATA COLLECTION
1
21421014fa
LTC2142-14/
LTC2141-14/LTC2140-14
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
14-Bit, 65Msps/
40Msps/25Msps Low Power
Dual ADCs
n Communications
n Cellular Base Stations
n Software Defined Radios
n Portable Medical Imaging
n Multi-Channel Data Acquisition
n Nondestructive Testing
n Two-Channel Simultaneously Sampling ADC
n 73.2dB SNR
n 90dB SFDR
n Low Power: 95mW/67mW/50mW Total
48mW/34mW/25mW per Channel
n Single 1.8V Supply
n CMOS, DDR CMOS, or DDR LVDS Outputs
n Selectable Input Ranges: 1VP-P to 2VP-P
n 750MHz Full Power Bandwidth S/H
n Optional Data Output Randomizer
n Optional Clock Duty Cycle Stabilizer
n Shutdown and Nap Modes
n Serial SPI Port for Configuration
n 64-Pin (9mm × 9mm) QFN Package
The LTC
2142-14/LTC2141-14/LTC2140-14 are 2-channel
simultaneous sampling 14-bit A/D converters designed
for digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 73.2dB SNR and
90dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.08psRMS allows undersampling of IF frequencies with
excellent noise performance.
DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ)
and no missing codes over temperature. The transition
noise is 1.2LSBRMS.
The digital outputs can be either full rate CMOS, double
data rate CMOS, or double data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC+ and ENCinputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
2-Tone FFT, fIN = 70MHz and 69MHz
CMOS,
DDR CMOS,
OR
DDR LVDS
OUTPUTS
1.8V
VDD
1.8V
OVDD
CLOCK
CONTROL
D1_13
D1_0
21421014 TA01a
CH 1
ANALOG
INPUT
OUTPUT
DRIVERS
GND
OGND
S/H
14-BIT
ADC CORE
CH 2
ANALOG
INPUT
S/H
14-BIT
ADC CORE
D2_13
D2_0
65MHz
CLOCK
FREQUENCY (MHz)
–100
–110
–120
–70
–60
–80
–90
AMPLITUDE
(dBFS) –50
–30
–40
–20
–10
0
21421014 TA01b
0
5
10
15
20
25
30
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