The AIN+ and AIN–
參數(shù)資料
型號(hào)： LTC2230CUP#TRPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 14/32頁(yè)
文件大?。?/td> 0K
描述： IC ADC 10BIT 170MSPS 64-QFN
標(biāo)準(zhǔn)包裝： 2,000
位數(shù)： 10
采樣率（每秒）： 170M
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 1.18W
電壓電源： 單電源
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 64-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 64-QFN（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 1 個(gè)單端，雙極; 1 個(gè)差分，雙極
LTC2230/LTC2231
21
22301fb
The AIN+ and AIN– inputs each have two pins to reduce
package inductance. The two AIN+ and the two AIN– pins
should be shorted together.
For input frequencies above 100MHz the input circuits of
Figure 6, 7 and 8 are recommended. The balun trans-
former gives better high frequency response than a flux
coupled center tapped transformer. The coupling capaci-
tors allow the analog inputs to be DC biased at 1.6V. In
Figure 8 the series inductors are impedance matching
elements that maximize the ADC bandwidth.
Reference Operation
Figure 9 shows the LTC2230/LTC2231 reference circuitry
consisting of a 1.6V bandgap reference, a difference
amplifier and switching and control circuit. The internal
voltage reference can be configured for two pin selectable
input ranges of 2V (
±1V differential) or 1V (±0.5V differ-
ential). Tying the SENSE pin to VDD selects the 2V range;
typing the SENSE pin to VCM selects the 1V range.
The 1.6V bandgap reference serves two functions: its
output provides a DC bias point for setting the common
mode voltage of any external input circuitry; additionally,
the reference is used with a difference amplifier to gener-
ate the differential reference levels needed by the internal
ADC circuitry. An external bypass capacitor is required for
the 1.6V reference output, VCM. This provides a high
frequency low impedance path to ground for internal and
external circuitry.
The difference amplifier generates the high and low refer-
ence for the ADC. High speed switching circuits are
connected to these outputs and they must be externally
bypassed. Each output has four pins: two each of REFHA
and REFHB for the high reference and two each of REFLA
and REFLB for the low reference. The multiple output pins
are needed to reduce package inductance. Bypass capaci-
tors must be connected as shown in Figure 9.
APPLICATIO S I FOR ATIO
WU
UU
25
Ω
25
Ω
12
Ω
12
Ω
0.1
μF
AIN
+
AIN
+
AIN
–
AIN
–
8pF
2.2
μF
VCM
LTC2230/
LTC2231
ANALOG
INPUT
0.1
μF
0.1
μF
T1
T1 = MA/COM ETC1-1-13
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
22301 F06
25
Ω
25
Ω
0.1
μF
AIN
+
AIN
+
AIN
–
AIN
–
2.2
μF
VCM
LTC2230/
LTC2231
ANALOG
INPUT
0.1
μF
0.1
μF
T1
T1 = MA/COM ETC1-1-13
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
22301 F07
25
Ω
25
Ω
0.1
μF
AIN
+
AIN
+
AIN
–
AIN
–
2pF
2.2
μF
VCM
LTC2230/
LTC2231
ANALOG
INPUT
0.1
μF
0.1
μF
T1
T1 = MA/COM ETC1-1-13
RESISTORS, CAPACITORS
ARE 0402 PACKAGE SIZE
22301 F08
4.7nH
Figure 6. Recommended Front End Circuit for Input
Frequencies Between 100MHz and 250MHz
Figure 7. Recommended Front End Circuit for Input
Frequencies Between 250MHz and 500MHz
Figure 8. Recommended Front End Circuit
for Input Frequencies Above 500MHz
VCM
REFHA
REFLB
SENSE
TIE TO VDD FOR 2V RANGE;
TIE TO VCM FOR 1V RANGE;
RANGE = 2 VSENSE FOR
0.5V < VSENSE < 1V
1.6V
REFLA
REFHB
2.2
μF
2.2
μF
INTERNAL ADC
HIGH REFERENCE
BUFFER
0.1
μF
22301 F09
LTC2230/LTC2231
4
Ω
DIFF AMP
1
μF
1
μF
0.1
μF
INTERNAL ADC
LOW REFERENCE
1.6V BANDGAP
REFERENCE
1V
0.5V
RANGE
DETECT
AND
CONTROL
Figure 9. Equivalent Reference Circuit
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