參數(shù)資料
型號: LTC2267IUJ-14#TRPBF
廠商: Linear Technology
文件頁數(shù): 1/32頁
文件大小: 0K
描述: IC ADC 14BIT 105MSPS DUAL 40QFN
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 14
采樣率(每秒): 105M
數(shù)據(jù)接口: Serial LVDS
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 295mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-QFN(6x6)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 Differential; 2 Single-Ended
配用: DC1371A-ND - BOARD USB DATA ACQUISITION HS
LTC2268-14/
LTC2267-14/LTC2266-14
1
22687614fa
Typical applicaTion
DescripTion
14-Bit, 125Msps/105Msps/
80Msps Low Power Dual ADCs
TheLTC2268-14/LTC2267-14/LTC2266-14are2-channel,
simultaneous sampling 14-bit A/D converters designed
for digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 73.1dB SNR and
88dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.15psRMSallowsundersamplingofIFfrequencieswith
excellent noise performance.
DC specs include
±1LSB INL (typ), ±0.3LSB DNL (typ)
and no missing codes over temperature. The transition
noise is a low 1.2LSBRMS.
The digital outputs are serial LVDS to minimize the num-
ber of data lines. Each channel outputs two bits at a time
(2-lane mode). At lower sampling rates there is a one bit
per channel option (1-lane mode). The LVDS drivers have
optional internal termination and adjustable output levels
to ensure clean signal integrity.
The ENC+ and ENCinputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An internal clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
FeaTures
applicaTions
n
2-Channel Simultaneous Sampling ADC
n
73.1dB SNR
n
88dB SFDR
n
Low Power: 299mW/243mW/203mW Total
n
150mW/121mW/101mW Per Channel
n
Single 1.8V Supply
n
Serial LVDS Outputs: 1 or 2 Bits Per Channel
n
Selectable Input Ranges: 1VP-P to 2VP-P
n
800MHz Full Power Bandwidth S/H
n
Shutdown and Nap Modes
n
Serial SPI Port for Configuration
n
Pin Compatible 14-Bit and 12-Bit Versions
n
40-Pin (6mm
× 6mm) QFN Package
n
Communications
n
Cellular Base Stations
n
Software Defined Radios
n
Portable Medical Imaging
n
Multichannel Data Acquisition
n
Nondestructive Testing
LTC2268-14, 125Msps,
2-Tone FFT, fIN = 70MHz and 75MHz
L
, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
CH.1
ANALOG
INPUT
CH.2
ANALOG
INPUT
ENCODE
INPUT
226814 TA01
GND
OGND
14-BIT
ADC CORE
14-BIT
ADC CORE
PLL
DATA
SERIALIZER
SERIALIZED
LVDS
OUTPUTS
1.8V
VDD
OVDD
OUT1A
OUT1B
OUT2A
OUT2B
DATA
CLOCK
OUT
FRAME
S/H
FREQUENCY (MHz)
0
–100
–110
–120
–70
–60
–80
–90
AMPLITUDE
(dBFS) –50
–30
–40
–20
–10
0
10
20
30
40
50
60
226814 TA01b
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