- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10052 > LTC2267IUJ-14#TRPBF (Linear Technology)IC ADC 14BIT 105MSPS DUAL 40QFN PDF資料下載
參數(shù)資料
| 型號： | LTC2267IUJ-14#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 16/32頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 105MSPS DUAL 40QFN |
| 標準包裝： | 2,000 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 105M |
| 數(shù)據(jù)接口： | Serial LVDS |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 295mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 40-QFN（6x6） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 Differential; 2 Single-Ended |
| 配用： | DC1371A-ND - BOARD USB DATA ACQUISITION HS |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
LTC2268-14/
LTC2267-14/LTC2266-14
23
22687614fa
By default the outputs are standard LVDS levels: 3.5mA
output current and a 1.25V output common mode volt-
age. An external 100 differential termination resistor
is required for each LVDS output pair. The termination
resistors should be located as close as possible to the
LVDS receiver.
The outputs are powered by OVDD and OGND which are
isolated from the A/D core power and ground.
Programmable LVDS Output Current
The default output driver current is 3.5mA. This current
can be adjusted by control register A2 in the serial pro-
gramming mode. Available current levels are 1.75mA,
2.1mA, 2.5mA, 3mA, 3.5mA, 4mA and 4.5mA. In the
parallel programming mode the SCK pin can select either
3.5mA or 1.75mA.
Optional LVDS Driver Internal Termination
In most cases using just an external 100 termination
resistor will give excellent LVDS signal integrity. In addi-
tion, an optional internal 100 termination resistor can
be enabled by serially programming mode control register
A2. The internal termination helps absorb any reflections
caused by imperfect termination at the receiver. When the
internal termination is enabled, the output driver current is
doubled to maintain the same output voltage swing. In the
Parallel Programming Mode, the SDO pin enables internal
termination. Internal termination should only be used with
1.75mA, 2.1mA or 2.5mA LVDS output current modes.
applicaTions inForMaTion
DATA FORMAT
Table 2 shows the relationship between the analog input
voltage and the digital data output bits. By default the
output data format is offset binary. The 2’s complement
format can be selected by serially programming mode
control register A1.
Table 2. Output Codes vs Input Voltage
AIN+ – AIN–
(2V RANGE)
D13-D0
(OFFSET BINARY)
D13-D0
(2’s COMPLEMENT)
>1.000000V
+0.999878V
+0.999756V
11 1111 1111 1111
11 1111 1111 1110
01 1111 1111 1111
01 1111 1111 1110
+0.000122V
+0.000000V
–0.000122V
–0.000244V
10 0000 0000 0001
10 0000 0000 0000
01 1111 1111 1111
01 1111 1111 1110
00 0000 0000 0001
00 0000 0000 0000
11 1111 1111 1111
11 1111 1111 1110
–0.999878V
–1.000000V
≤–1.000000V
00 0000 0000 0001
00 0000 0000 0000
10 0000 0000 0001
10 0000 0000 0000
Digital Output Randomizer
Interference from the A/D digital outputs is sometimes
unavoidable.Digitalinterferencemaybefromcapacitiveor
inductive coupling or coupling through the ground plane.
Even a tiny coupling factor can cause unwanted tones
in the ADC output spectrum. By randomizing the digital
output before it is transmitted off chip, these unwanted
tones can be randomized which reduces the unwanted
tone amplitude.
Table 1. Maximum Sampling Frequency for All Serialization Modes. Note That These Limits Are for the LTC2268-14. The Sampling
Frequency for the Slower Speed Grades Cannot Exceed 105MHz (LTC2267-14) or 80MHz (LTC2266-14).
SERIALIZATION MODE
MAXIMUM SAMPLING
FREQUENCY, fS (MHz)
DCO FREQUENCY
FR FREQUENCY
SERIAL DATA RATE
2-Lane
16-Bit Serialization
125
4 fS
fS
8 fS
2-Lane
14-Bit Serialization
125
3.5 fS
0.5 fS
7 fS
2-Lane
12-Bit Serialization
125
3 fS
fS
6 fS
1-Lane
16-Bit Serialization
62.5
8 fS
fS
16 fS
1-Lane
14-Bit Serialization
71.4
7 fS
fS
14 fS
1-Lane
12-Bit Serialization
83.3
6 fS
fS
12 fS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC1348CG | IC TXRX 3.3V/5V RS232 28-SSOP |
| MS27473T14A15P | CONN PLUG 15POS STRAIGHT W/PINS |
| VI-2NM-IW-F3 | CONVERTER MOD DC/DC 10V 100W |
| IDT72811L10PF8 | IC FIFO SYNC DUAL 512X9 64-TQFP |
| LTC2267IUJ-14#PBF | IC ADC 14BIT 105MSPS DUAL 40QFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2268-12 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 20Msps Low Power ADC |
| LTC2268-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:16-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
| LTC2268CUJ-12#PBF | 功能描述:IC ADC 12BIT 125MSPS DUAL 40QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| LTC2268CUJ-12#TRPBF | 功能描述:IC ADC 12BIT 125MSPS DUAL 40QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| LTC2268CUJ-12PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 125Msps/105Msps/ 80Msps Low Power Dual ADCs |
發(fā)布緊急采購，3分鐘左右您將得到回復。