參數(shù)資料
型號(hào)： LTC2411-1
廠商： Linear Technology Corporation
英文描述： 16-Bit Universal Bus Driver With 3-State Outputs 48-TVSOP -40 to 85
中文描述： 2路差分輸入24位ADC的無延遲局副局長
文件頁數(shù)： 27/36頁
文件大?。?/td> 409K
代理商： LTC2411-1
LTC2412
27
2412f
APPLICATIU
W
U
U
In addition to this gain error, the converter INL perfor-
mance is degraded by the reference source impedance.
When F
O
= LOW (internal oscillator and 60Hz notch), every
100
of source resistance driving REF
+
or REF
–
translates
into about 1.34ppm additional INL error. When F
O
= HIGH
(internal oscillator and 50Hz notch), every 100
of source
resistance driving REF
+
or REF
–
translates into about
1.1ppm additional INL error. When F
O
is driven by an
external oscillator with a frequency f
EOSC
, every 100
of
source resistance driving REF
+
or REF
–
translates into
about 8.73 10
–6
f
EOSC
ppm additional INL error.
Figure22 shows the typical INL error due to the source
resistance driving the REF
+
or REF
–
pins when large C
REF
values are used. The effect of the source resistance on the
two reference pins is additive with respect to this INL error.
In general, matching of source impedance for the REF
+
and REF
–
pins does not help the gain or the INL error. The
user is thus advised to minimize the combined source
impedance driving the REF
+
and REF
–
pins rather than to
try to match it.
The magnitude of the dynamic reference current depends
upon the size of the very stable internal sampling capaci-
tors and upon the accuracy of the converter sampling
clock. The accuracy of the internal clock over the entire
temperature and power supply range is typical better than
0.5%. Such a specification can also be easily achieved by
an external clock. When relatively stable resistors
Figure 18. +FS Error vs R
SOURCE
at REF
+
or REF
–
(Small C
IN
)
Figure 19. –FS Error vs R
SOURCE
at REF
+
or REF
–
(Small C
IN
)
Figure 20. +FS Error vs R
SOURCE
at REF
+
and REF
–
(Large C
REF
)
Figure 21. –FS Error vs R
SOURCE
at REF
+
and REF
–
(Large C
REF
)
R
SOURCE
(
)
1
10
100
1k
10k
100k
+
R
)
2412 F18
0
–10
–20
–30
–40
–50
V
= 5V
REF
+
= 5V
REF
–
= GND
IN
+
= 5V
IN
–
= 2.5V
F
O
= GND
T
A
= 25
°
C
C
REF
= 0.01
μ
F
C
REF
= 0.001
μ
F
C
REF
= 100pF
C
REF
= 0pF
R
SOURCE
(
)
1
10
100
1k
10k
100k
–
R
)
2412 F19
50
40
30
20
10
0
V
= 5V
REF
+
= 5V
REF
–
= GND
IN
+
= GND
IN
–
= 2.5V
F
O
= GND
T
A
= 25
°
C
C
REF
= 0.01
μ
F
C
REF
= 0.001
μ
F
C
REF
= 100pF
C
REF
= 0pF
R
SOURCE
(
)
0 100 200 300 400 500 600 700 800 9001000
+
R
)
2412 F20
0
–90
–180
–270
–360
–450
V
CC
= 5V
REF
= 5V
REF
–
= GND
IN
+
= 3.75V
IN
–
= 1.25V
F
O
= GND
T
A
= 25
°
C
C
REF
= 0.01
μ
F
C
REF
= 0.1
μ
F
C
REF
= 1
μ
F, 10
μ
F
R
SOURCE
(
)
0 100 200 300 400 500 600 700 800 9001000
–
R
)
2412 F21
450
360
270
180
90
0
V
CC
= 5V
REF
= 5V
REF
–
= GND
IN
+
= 1.25V
IN
–
= 3.75V
F
O
= GND
T
A
= 25
°
C
C
REF
= 0.01
μ
F
C
REF
= 0.1
μ
F
C
REF
= 1
μ
F, 10
μ
F
相關(guān)PDF資料
PDF描述
LTC2412 16-Bit Universal Bus Driver With 3-State Outputs 48-SSOP -40 to 85
LTC2412CGN 16-Bit Universal Bus Driver With 3-State Outputs 48-TVSOP -40 to 85
LTC2414 2-Channel Differential Input 24-Bit No Latency DS ADC
LTC2418 Replaced by SN74ALVCH16374 : 16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 48-SSOP -40 to 85
LTC2412IGN 2-Channel Differential Input 24-Bit No Latency DS ADC
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