參數(shù)資料
型號(hào)： LTC2418IGN#TRPBF
廠商： Linear Technology
文件頁數(shù)： 28/48頁
文件大?。?/td> 0K
描述： IC ADC 24BIT DIFF INPUT 28SSOP
標(biāo)準(zhǔn)包裝： 2,500
位數(shù)： 24
采樣率（每秒）： 7.5
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 1mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 28-SSOP
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 16 個(gè)單端，單極；16 個(gè)單端，雙極；8 個(gè)差分，單極；8 個(gè)差分，雙極
配用： DC571A-ND - BOARD DELTA SIGMA ADC LTC2418
LTC2414/LTC2418
34
241418fa
The combined normal mode rejection performance is
shown in Figure 33 for the internal oscillator with 50Hz
notch setting (FO = HIGH) and in Figure 34 for the internal
oscillator with 60Hz notch setting (FO = LOW) and for the
external oscillator mode. The regions of low rejection
occurring at integer multiples of fS have a very narrow
bandwidth. Magnified details of the normal mode rejection
curves are shown in Figure 35 (rejection near DC) and
Figure 36 (rejection at fS = 256fN) where fN represents the
notch frequency. These curves have been derived for the
external oscillator mode but they can be used in all
operating modes by appropriately selecting the fN value.
The user can expect to achieve in practice this level of
performance using the internal oscillator as it is demon-
strated by Figures 37 and 38. Typical measured values of
the normal mode rejection of the LTC2414/LTC2418
operating with an internal oscillator and a 60Hz notch
setting are shown in Figure 37 superimposed over the
theoretical calculated curve. Similarly, typical measured
values of the normal mode rejection of the LTC2414/
LTC2418 operating with an internal oscillator and a 50Hz
notch setting are shown in Figure 38 superimposed over
the theoretical calculated curve.
As a result of these remarkable normal mode specifica-
tions, minimal (if any) antialias filtering is required in front
of the LTC2414/LTC2418. If passive RC components are
placed in front of the LTC2414/LTC2418, the input dy-
namic current should be considered (see Input Current
section). In cases where large effective RC time constants
are used, an external buffer amplifier may be required to
minimize the effects of dynamic input current.
Figure 35. Input Normal Mode Rejection
Figure 36. Input Normal Mode Rejection
Figure 37. Input Normal Mode Rejection vs Input Frequency
with Input Perturbation of 100% Full Scale (60Hz Notch)
Figure 38. Input Normal Mode Rejection vs Input Frequency
with Input Perturbation of 100% Full Scale (50Hz Notch)
APPLICATIO S I FOR ATIO
WU
UU
INPUT SIGNAL FREQUENCY (Hz)
INPUT
NORMAL
MODE
REJECTION
(dB)
2414/18 F35
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
fN
0
2fN 3fN 4fN 5fN 6fN 7fN 8fN
INPUT SIGNAL FREQUENCY (Hz)
250fN 252fN 254fN 256fN 258fN 260fN 262fN
INPUT
NORMAL
MODE
REJECTION
(dB)
2414/18 F36
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
INPUT FREQUENCY (Hz)
0
15
30
45
60
75
90
105 120 135 150 165 180 195 210 225 240
NORMAL
MODE
REJECTION
(dB)
2414/18 F37
0
–20
–40
–60
–80
–100
–120
VCC = 5V
REF+ = 5V
REF – = GND
VINCM = 2.5V
VIN(P-P) = 5V
SDI = GND
FO = GND
TA = 25°C
MEASURED DATA
CALCULATED DATA
INPUT FREQUENCY (Hz)
0
12.5
25
37.5
50
62.5
75
87.5 100 112.5 125 137.5 150 162.5 175 187.5 200
NORMAL
MODE
REJECTION
(dB)
2414/18 F38
0
–20
–40
–60
–80
–100
–120
VCC = 5V
REF+ = 5V
REF – = GND
VINCM = 2.5V
VIN(P-P) = 5V
SDI = GND
FO = 5V
TA = 25°C
MEASURED DATA
CALCULATED DATA
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