參數(shù)資料
型號(hào): LTC2418IGN
廠商: LINEAR TECHNOLOGY CORP
元件分類(lèi): ADC
英文描述: 8-/16-Channel 24-Bit No Latency TM ADCs
中文描述: 16-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
封裝: 0.150 INCH, PLASTIC, SSOP-28
文件頁(yè)數(shù): 11/48頁(yè)
文件大?。?/td> 775K
代理商: LTC2418IGN
LTC2414/LTC2418
11
241418fa
CS is HIGH. While in the sleep state, power consumption
is reduced by nearly two orders of magnitude. The conver-
sion result is held indefinitely in a static shift register while
the converter is in the sleep state.
Once CS is pulled LOW, the device exits the low power
mode and enters the data output state. If CS is pulled HIGH
before the first rising edge of SCK, the device returns to the
low power sleep mode and the conversion result is still
held in the internal static shift register. If CS remains LOW
after the first rising edge of SCK, the device begins output-
ting the conversion result and inputting channel selection
bits. Taking CS high at this point will terminate the data
output state and start a new conversion. The channel
selection control bits are shifted in through SDI from the
Figure 1
W
FU
TEST CIRCUITS
AUTOCALIBRATION
AND CONTROL
DIFFERENTIAL
3RD ORDER
Σ
MODULATOR
DECIMATING FIR
ADDRESS
INTERNAL
OSCILLATOR
SERIAL
INTERFACE
GND
V
CC
CH0
CH1
CH15
COM
IN
+
IN
MUX
SDO
CS
SCK
REF
+
REF
SDI
F
O
(INT/EXT)
241418 F01
+
1.69k
SDO
241418 TA02
Hi-Z TO V
OH
V
OL
TO V
V
OH
TO Hi-Z
C
LOAD
= 20pF
1.69k
SDO
241418 TA03
Hi-Z TO V
OL
V
OH
TO V
V
OL
TO Hi-Z
C
LOAD
= 20pF
V
CC
CONVERTER OPERATION
Converter Operation Cycle
The LTC2414/LTC2418 are multichannel, low power, delta-
sigma analog-to-digital converters with an easy-to-use
4-wire serial interface (see Figure 1). Their operation is made
up of three states. The converter operating cycle begins with
the conversion, followed by the low power sleep state and
ends with the data input/output (see Figure 2). The 4-wire
interface consists of serial data input (SDI), serial data out-
put (SDO), serial clock (SCK) and chip select (CS).
Initially, the LTC2414 or LTC2418 performs a conversion.
Once the conversion is complete, the device enters the
sleep state. The part remains in the sleep state as long as
APPLICATIOU
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相關(guān)PDF資料
PDF描述
LTC2415-1CGN 24-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2415-1IGN 24-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2415CGN 24-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2415IGN 24-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2415 2-Channel Differential Input 24-Bit No Latency DS ADC
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