參數(shù)資料
型號(hào)： LTC2418IGN
廠(chǎng)商： LINEAR TECHNOLOGY CORP
元件分類(lèi)： ADC
英文描述： 8-/16-Channel 24-Bit No Latency TM ADCs
中文描述： 16-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
封裝： 0.150 INCH, PLASTIC, SSOP-28
文件頁(yè)數(shù)： 17/48頁(yè)
文件大?。?/td> 775K
代理商： LTC2418IGN
LTC2414/LTC2418
17
241418fa
When a fundamental rejection frequency different from
50Hz or 60Hz is required or when the converter must be
synchronized with an outside source, the LTC2414/
LTC2418 can operate with an external conversion clock.
The converter automatically detects the presence of an
external clock signal at the F
O
pin and turns off the internal
oscillator. The frequency f
EOSC
of the external signal must
be at least 2560Hz (1Hz notch frequency) to be detected.
The external clock signal duty cycle is not significant as
long as the minimum and maximum specifications for the
high and low periods t
HEO
and t
LEO
are observed.
While operating with an external conversion clock of a
frequency f
EOSC
, the converter provides better than 110dB
normal mode rejection in a frequency range f
EOSC
/2560
±
4% and its harmonics. The normal mode rejection as a
function of the input frequency deviation from f
EOSC
/2560
is shown in Figure 4.
Whenever an external clock is not present at the F
O
pin, the
converter automatically activates its internal oscillator and
enters the Internal Conversion Clock mode. The converter
operation will not be disturbed if the change of conversion
clock source occurs during the sleep state or during the
data output state while the converter uses an external
serial clock. If the change occurs during the conversion
state, the result of the conversion in progress may be
outside specifications but the following conversions will
not be affected. If the change occurs during the data output
state and the converter is in the Internal SCK mode, the
serial clock duty cycle may be affected but the serial data
stream will remain valid.
Table 5 summarizes the duration of each state and the
achievable output data rate as a function of F
O
.
SERIAL INTERFACE PINS
The LTC2414/LTC2418 transmit the conversion results
and receive the start of conversion command through a
synchronous 4-wire interface. During the conversion and
sleep states, this interface can be used to assess the con-
verter status and during the data I/O state it is used to read
the conversion result and write in channel selection bits.
Figure 4. LTC2414/LTC2418 Normal Mode Rejection
When Using an External Oscillator of Frequency f
EOSC
DIFFERENTIAL INPUT SIGNAL FREQUENCY
DEVIATION FROM NOTCH FREQUENCY f
EOSC
/2560(%)
–12
–8
–4
0
4
8
12
N
241418 F04
–80
–85
–90
–95
–100
–105
–110
–115
–120
–125
–130
–135
–140
APPLICATIOU
W
U
U
Table 4. LTC2414/LTC2418 Output Data Format
Differential Input Voltage
V
IN
*
V
IN
*
≥
0.5 V
REF
**
0.5 V
REF
** – 1LSB
0.25 V
REF
**
0.25 V
REF
** – 1LSB
0
–1LSB
–0.25 V
REF
**
–0.25 V
REF
** – 1LSB
–0.5 V
REF
**
V
IN
* < –0.5 V
REF
**
*The differential input voltage V
IN
= IN
+
– IN
–
.
**The differential reference voltage V
REF
= REF
+
– REF
–
.
Bit 31
EOC
0
0
0
0
0
0
0
0
0
0
Bit 30
DMY
0
0
0
0
0
0
0
0
0
0
Bit 29
SIG
1
1
1
1
1
0
0
0
0
0
Bit 28
MSB
1
0
0
0
0
1
1
1
1
0
Bit 27
Bit 26
Bit 25
…
Bit 6
LSB
0
1
0
1
0
1
0
1
0
1
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
…
…
…
…
…
…
…
…
…
…
相關(guān)PDF資料
PDF描述
LTC2415-1CGN 24-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2415-1IGN 24-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2415CGN 24-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2415IGN 24-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2415 2-Channel Differential Input 24-Bit No Latency DS ADC
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