參數(shù)資料
型號(hào)： LTC2424IG
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 16-Bit 2.5-V to 3.3-V/3.3-V To 5-V Level Shifting Transceiver With 3-State Outputs 48-TSSOP -40 to 85
中文描述： 4-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28
封裝： 0.209 INCH, PLASTIC, SSOP-28
文件頁(yè)數(shù)： 32/36頁(yè)
文件大?。?/td> 409K
代理商： LTC2424IG
LTC2412
32
2412f
APPLICATIU
W
U
U
Figure36 (rejection at f
S
= 256f
N
) where f
N
represents the
notch frequency. These curves have been derived for the
external oscillator mode but they can be used in all
operating modes by appropriately selecting the f
N
value.
The user can expect to achieve in practice this level of
performance using the internal oscillator as it is demon-
strated by Figures 37 and 38. Typical measured values of
the normal mode rejection of the LTC2412 operating with
an internal oscillator and a 60Hz notch setting are shown
in Figure 37 superimposed over the theoretical calculated
curve. Similarly, typical measured values of the normal
mode rejection of the LTC2412 operating with an internal
oscillator and a 50Hz notch setting are shown in Figure 38
superimposed over the theoretical calculated curve.
As a result of these remarkable normal mode specifica-
tions, minimal (if any) antialias filtering is required in front
of the LTC2412. If passive RC components are placed in
front of the LTC2412, the input dynamic current should be
considered (see Input Current section). In cases where
large effective RC time constants are used, an external
buffer amplifier may be required to minimize the effects of
dynamic input current.
Traditional high order delta-sigma modulators, while pro-
viding very good linearity and resolution, suffer from po-
tential instabilities at large input signal levels. The
proprietary architecture used for the LTC2412 third order
modulator resolves this problem and guarantees a pre-
dictable stable behavior at input signal levels of up to 150%
INPUT SIGNAL FREQUENCY (Hz)
I
2412 F35
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
f
N
0
2f
N
3f
N
4f
N
5f
N
6f
N
7f
N
8f
N
INPUT SIGNAL FREQUENCY (Hz)
250f
N
252f
N
254f
N
256f
N
258f
N
260f
N
262f
N
I
2412 F36
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
Figure 35. Input Normal Mode Rejection
Figure 36. Input Normal Mode Rejection
Figure 37. Input Normal Mode Rejection vs Input Frequency
with Input Perturbation of 100% Full Scale (60Hz Notch)
INPUT FREQUENCY (Hz)
0
15
30
45
60
75
90
105 120 135 150 165 180 195 210 225 240
N
2412 F37
0
–20
–40
–60
–80
–100
–120
V
CC
= 5V
REF
+
= 5V
REF
–
= GND
V
INCM
= 2.5V
V
IN(P-P)
= 5V
F
O
= GND
T
A
= 25
°
C
MEASURED DATA
CALCULATED DATA
相關(guān)PDF資料
PDF描述
LTC2440 2-Channel Differential Input 24-Bit No Latency DS ADC
LTC2411-1 16-Bit Universal Bus Driver With 3-State Outputs 48-TVSOP -40 to 85
LTC2412 16-Bit Universal Bus Driver With 3-State Outputs 48-SSOP -40 to 85
LTC2412CGN 16-Bit Universal Bus Driver With 3-State Outputs 48-TVSOP -40 to 85
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