參數(shù)資料
型號: LTC2435
廠商: Linear Technology Corporation
英文描述: 20-Bit No Latency ADCs with Differential Input and Differential Reference
中文描述: 20位無與差分輸入和差分ADC的參考延遲
文件頁數(shù): 27/40頁
文件大?。?/td> 463K
代理商: LTC2435
LTC2435/LTC2435-1
27
24351fa
APPLICATIU
tance driving IN
+
or IN
. When F
O
is driven by an external
oscillator with a frequency f
EOSC
(external conversion
clock operation), the typical differential input resistance is
3.3 10
12
/f
EOSC
and each ohm of source resistance
driving IN
+
or IN
will result in 0.15 10
–6
f
EOSC
ppm +FS
gain error. The effect of the source resistance on the two
input pins is additive with respect to this gain error. The
typical +FS and –FS errors as a function of the sum of the
source resistance seen by IN
+
and IN
for large values of
C
IN
are shown in Figures 18 and 19.
In addition to this gain error, an offset error term may also
appear. The offset error is proportional to the mismatch
between the source impedance driving the two input pins
IN
+
and IN
and with the difference between the input and
reference common mode voltages. While the input drive
circuit nonzero source impedance combined with the
converter average input current will not degrade the INL
performance, indirect distortion may result from the modu-
lation of the offset error by the common mode component
of the input signal. Thus, when using large C
IN
capacitor
values, it is advisable to carefully match the source imped-
ance seen by the IN
+
and IN
pins. When F
O
= LOW
(internal oscillator and 60Hz notch), every 1
mismatch
in source impedance transforms a full-scale common
mode input signal into a differential mode input signal of
0.023ppm. When F
O
= HIGH (internal oscillator and 50Hz
W
U
U
notch), every 1
mismatch in source impedance trans-
forms a full-scale common mode input signal into a
differential mode input signal of 0.02ppm. When F
O
is
driven by an external oscillator with a frequency f
EOSC
,
every 1
mismatch in source impedance transforms a
full-scale common mode input signal into a differential
mode input signal of 0.15 10
–6
f
EOSC
ppm. Figure 20
shows the typical offset error due to input common mode
voltage for various values of source resistance imbalance
between the IN
+
and IN
pins when large C
IN
values are
used.
If possible, it is desirable to operate with the input signal
common mode voltage very close to the reference signal
common mode voltage as is the case in the ratiometric
measurement of a symmetric bridge. This configuration
eliminates the offset error caused by mismatched source
impedances.
The magnitude of the dynamic input current depends upon
the size of the very stable internal sampling capacitors and
upon the accuracy of the converter sampling clock. The
accuracy of the internal clock over the entire temperature
and power supply range is typical better than 0.5%. Such
a specification can also be easily achieved by an external
clock. When relatively stable resistors (50ppm/
°
C) are
used for the external source impedance seen by IN
+
and
IN
, the expected drift of the dynamic current, offset and
Figure 18. +FS Error vs R
SOURCE
at IN
+
or IN
(Large C
IN
)
Figure 19. –FS Error vs R
SOURCE
at IN
+
or IN
(Large C
IN
)
Figure 20. Offset Error vs Common Mode
Voltage (V
INCM
= V
IN+
= V
IN–
) and Input
Source Resistance Imbalance (
R
IN
=
R
SOURCEIN
+ – R
SOURCEIN
–) for Large C
IN
Values (C
IN
1
μ
F)
R
SOURCE
(
)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
+
2435 F18
0
400
800
1200
1600
2000
V
= 5V
V
CC
= 5V
V
REF–
= GND
V
IN+
= 3.75V
V
IN–
= 1.25V
F
O
= GND
T
A
= 25
°
C
C
IN
= 1
μ
F, 10
μ
F
C
IN
= 0.01
μ
F
C
IN
= 0.1
μ
F
R
SOURCE
(
)
100
90
80
70
60
50
40
30
20
10
0
2435 F19
0
400
800
1200
1600
2000
V
= 5V
V
CC
= 5V
V
REF–
= GND
V
IN+
= 1.25V
V
IN–
= 3.75V
F
O
= GND
T
A
= 25
°
C
C
IN
= 1
μ
F, 10
μ
F
C
IN
= 0.01
μ
F
C
IN
= 0.1
μ
F
A
B
C
D
E
F
G
V
INCM
(V)
0
O
–310
–320
–330
–340
–350
–360
–370
–380
2435 F20
2.0
5.0
1.0
3.0
4.0
0.5
2.5
1.5
3.5
4.5
V
= 5V
V
CC
= 5V
V
REF–
= GND
V
IN+
= V
IN–
= V
INCM
A:
R
IN
= 1k
B:
R
IN
= 500
C:
R
IN
= 200
D:
R
IN
= 0
E:
R
IN
= –200
F:
R
IN
= –500
G:
R
IN
= –1k
F
O
= GND
T
A
= 25
°
C
C
IN
= 10
μ
F
相關PDF資料
PDF描述
LTC2435-1 20-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2435-1CGN 20-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2435CGN 20-Bit No Latency ADCs with Differential Input and Differential Reference
LTC2436-1IGN 2-Channel Differential Input 16-Bit No Latency DS ADC
LTC2436-1 2-Channel Differential Input 16-Bit No Latency DS ADC
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