The l denotes the specifications which apply over the full operating
參數(shù)資料
型號(hào): LTC2451ITS8#TRPBF
廠商: Linear Technology
文件頁數(shù): 14/20頁
文件大小: 0K
描述: IC ADC 16BIT DELTA SIG TSOT23-8
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 16
采樣率(每秒): 60
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 1.2mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-8 薄型,TSOT-23-8
供應(yīng)商設(shè)備封裝: TSOT-23-8
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個(gè)單端,單極
配用: DC1383A-A-ND - BOARD DELTA SIGMA ADC LTC2451
LTC2451
3
2451fg
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V. (Notes 2, 7)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
tCONV
Conversion Time
30Hz Mode
l
26
33.2
46
ms
tCONV
Conversion Time
60Hz Mode
l
13
16.6
23
ms
fSCL
SCL Clock Frequency
l
0
400
kHz
tHD(SDA)
Hold Time (Repeated) START Condition
l
0.6
s
tLOW
LOW Period of the SCL Pin
l
1.3
s
tHIGH
HIGH Period of the SCL Pin
l
0.6
s
tSU(STA)
Set-Up Time for a Repeated START Condition
l
0.6
s
tHD(DAT)
Data Hold Time
l
0
0.9
s
tSU(DAT)
Data Set-Up Time
l
100
ns
tr
Rise Time for SDA/SCL Signals
(Note 6)
l
20 + 0.1CB
300
ns
tf
Fall Time for SDA/SCL Signals
(Note 6)
l
20 + 0.1CB
300
ns
tSU(STO)
Set-Up Time for STOP Condition
l
0.6
s
tBUF
Bus Free Time Between a STOP and START
Condition
l
1.3
s
I2C TIMING CHARACTERISTICS
The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. VCC = 2.7V to 5.5V. (Note 2)
ANALOG INPUT AND REFERENCES The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VCC
Supply Voltage
l
2.7
5.5
V
ICC
Supply Current
Conversion
Sleep
l
400
0.2
700
0.5
A
POWER REQUIREMENTS The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIH
High Level Input Voltage
l
0.7VCC
V
VIL
Low Level Input Voltage
l
0.3VCC
V
VHYS
Hysteresis of Schmidt Trigger Inputs
(Note 3)
l
0.05VCC
V
VOL
Low Level Output Voltage (SDA)
I = 3mA
l
0.4
V
IIN
Input Leakage
0.1VCC ≤ VIN ≤ 0.9VCC
l
–1
1
A
CI
Capacitance for Each I/O Pin
l
10
pF
CB
Capacitance Load for Each Bus Line
l
400
pF
I2C INPUTS AND OUTPUTS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIN
Input Voltage Range
l
VREF–
VREF+
V
VREF+
Positive Reference Voltage Range
VREF+ – VREF– ≥ 2.5V
l
VCC – 2.5
VCC
V
VREF–
Negative Reference Voltage Range
VREF+ – VREF– ≥ 2.5V
l
0
VCC – 2.5
V
CIN
IN Sampling Capacitance
0.35
pF
IDC_LEAK(VIN)
IN DC Leakage Current
VIN = GND (Note 8)
VIN = VCC (Note 8)
l
–10
1
10
nA
IDC_LEAK(REF+, REF–) REF+, REFDC Leakage Current
VREF = 5V (Note 8)
l
–10
1
10
nA
ICONV
Input Sampling Current (Note 5)
50
nA
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