參數(shù)資料
型號(hào)： LTC2480IDD
廠商： LINEAR TECHNOLOGY CORP
元件分類(lèi)： ADC
英文描述： 16-Bit ADC with Easy Drive
中文描述： 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO10
封裝： 3 X 3 MM, PLASTIC, MO-229WEED-2, DFN-10
文件頁(yè)數(shù)： 13/40頁(yè)
文件大?。?/td> 535K
代理商： LTC2480IDD
13
LTC2480
2480f
APPLICATIU
While in this sleep state, power consumption is reduced by
two orders of magnitude. The part remains in the sleep
state as long as CS is HIGH. The conversion result is held
indefinitely in a static shift register while the converter is
in the sleep state.
Once CS is pulled LOW, the device exits the low power
mode and enters the data output state. If CS is pulled HIGH
before the first rising edge of SCK, the device returns to the
low power sleep mode and the conversion result is still
held in the internal static shift register. If CS remains LOW
after the first rising edge of SCK, the device begins
outputting the conversion result. Taking CS high at this
point will terminate the data input and output state and
start a new conversion. The conversion result is shifted
out of the device through the serial data output pin (SDO)
on the falling edge of the serial clock (SCK) (see Figure 2).
The LTC2480 includes a serial data input pin (SDI) in
which data is latched by the device on the rising edge of
SCK (Figure 2). The bit stream applied to this pin can be
used to select various features of the LTC2480, including
an on-chip temperature sensor, programmable GAIN, line
frequency rejection and output data rate. Alternatively, this
pin may be tied to ground and the part will perform
conversions in a default state. In the default state (SDI
grounded) the device simply performs conversions on the
user applied input with a GAIN of 1 and simultaneous
rejection of 50Hz and 60Hz line frequencies.
Through timing control of the CS and SCK pins, the
LTC2480 offers several flexible modes of operation
(internal or external SCK and free-running conversion
modes). These various modes do not require program-
ming configuration registers; moreover, they do not dis-
turb the cyclic operation described above. These modes of
operation are described in detail in the Serial Interface
Timing Modes section.
W
U
U
Easy Drive Input Current Cancellation
The LTC2480 combines a high precision delta-sigma ADC
with an automatic differential input current cancellation
front end. A proprietary front-end passive sampling
network transparently removes the differential input cur-
rent. This enables external RC networks and high imped-
ance sensors to directly interface to the LTC2480 without
external amplifiers. The remaining common mode input
current is eliminated by either balancing the differential
input impedances or setting the common mode input
equal to the common mode reference (see Automatic
Input Current Cancellation section). This unique architec-
ture does not require on-chip buffers enabling input sig-
nals to swing all the way to ground and up to V
CC
.
Furthermore, the cancellation does not interfere with the
transparent offset and full-scale auto-calibration and the
absolute accuracy (full scale + offset + linearity) is main-
tained even with external RC networks.
Accessing the Special Features of the LTC2480
The LTC2480 combines a high resolution, low noise
Σ
analog-to-digital converter with an on-chip selectable tem-
perature sensor, programmable gain, programmable digi-
tal filter and output rate control. These special features are
selected through a single 8-bit serial input word during the
data input/output cycle (see Figure 2).
The LTC2480 powers up in a default mode commonly
used for most measurements. The device will remain in
this mode as long as the serial data input (SDI) is low. In
this default mode, the measured input is external, the
GAIN is 1, the digital filter simultaneously rejects 50Hz and
60Hz line frequency noise, and the speed mode is 1x
(offset automatically, continuously calibrated).
A simple serial interface grants access to any or all special
functions contained within the LTC2480. In order to
change the mode of operation, an enable bit (EN) followed
by up to 7 bits of data are shifted into the device (see
Table 1). The first 3 bits (GS2, GS1, GS0) control the GAIN
of the converter from 1 to 256. The 4th bit (IM) is used to
select the internal temperature sensor as the conversion
input, while the 5th and 6th bits (FA, FB) combine to
determine the line frequency rejection mode. The 7th bit
(SPD) is used to double the output rate by disabling the
offset auto calibration.
相關(guān)PDF資料
PDF描述
LTC2480CDD 16-Bit ADC with Easy Drive
LTC2486 16-Bit 2-/4-Channel ツヒ ADC with PGA and Easy Drive Input Current Cancellation
LTC2486CDE 16-Bit 2-/4-Channel ツヒ ADC with PGA and Easy Drive Input Current Cancellation
LTC2486IDE 16-Bit 2-/4-Channel ツヒ ADC with PGA and Easy Drive Input Current Cancellation
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