The combined effect of the internal SINC4 digital filte" />
參數(shù)資料
型號(hào)： LTC2483CDD#PBF
廠商： Linear Technology
文件頁(yè)數(shù)： 17/34頁(yè)
文件大?。?/td> 0K
描述： IC ADC 16BIT I2C 10-DFN
標(biāo)準(zhǔn)包裝： 121
位數(shù)： 16
采樣率（每秒）： 6.8
數(shù)據(jù)接口： I²C，串行
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 480µW
電壓電源： 單電源
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 10-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 10-DFN（3x3）
包裝： 管件
輸入數(shù)目和類型： 1 個(gè)差分，雙極
產(chǎn)品目錄頁(yè)面： 1348 (CN2011-ZH PDF)
配用： DC955A-ND - BOARD DELTA SIGMA ADC LTC2483
LTC2483
2483fc
Input Bandwidth
The combined effect of the internal SINC4 digital filter
and of the analog and digital autocalibration circuits de-
termines the LTC2483 input bandwidth. When the internal
oscillator is used, the 3dB input bandwidth is 3.3Hz. If an
external conversion clock generator of frequency fEOSC is
connected to the CA0/F0 pin, the 3dB input bandwidth is
11.8 10–6 fEOSC.
Due to the complex filtering and calibration algorithms
utilized, the converter input bandwidth is not modeled
very accurately by a first order filter with the pole located
at the 3dB frequency. When the internal oscillator is used,
the shape of the LTC2483 input bandwidth is shown in
Figure 24. When an external oscillator of frequency fEOSC
is used, the shape of the LTC2483 input bandwidth can
be derived from Figure 24, in which the horizontal axis
is scaled by fEOSC/279.2kHz.
The conversion noise (600nVRMS typical for VREF = 5V)
can be modeled by a white noise source connected to a
noisefreeconverter.Thenoisespectraldensityis47nV√Hz
for an infinite bandwidth source and 64nV√Hz for a single
0.5MHz pole source. From these numbers, it is clear that
particular attention must be given to the design of external
amplification circuits. Such circuits face the simultaneous
requirements of very low bandwidth (just a few Hz) in
order to reduce the output referred noise and relatively
high bandwidth (at least 500kHz) necessary to drive the
input switched-capacitor network. A possible solution is
a high gain, low bandwidth amplifier stage followed by a
high bandwidth unity-gain buffer.
When external amplifiers are driving the LTC2483, the
ADC input referred system noise calculation can be
simplified by Figure 25. The noise of an amplifier driving
the LTC2483 input pin can be modeled as a band limited
white noise source. Its bandwidth can be approximated
by the bandwidth of a single pole lowpass filter with a
corner frequency fi. The amplifier noise spectral density
is ni. From Figure 25, using fi as the x-axis selector, we
can find on the y-axis the noise equivalent bandwidth freqi
of the input driving amplifier. This bandwidth includes
the band limiting effects of the ADC internal calibration
and filtering. The noise of the driving amplifier referred
to the converter input and including all these effects can
applicaTions inFormaTion
be calculated as N = ni √freqi. The total system noise
(referred to the LTC2483 input) can now be obtained by
summing as square root of sum of squares the three
ADC input referred noise sources: the LTC2483 internal
noise, the noise of the IN+ driving amplifier and the noise
of the IN– driving amplifier.
If the CA0/F0 pin is driven by an external oscillator of
frequency fEOSC, Figure 25 can still be used for noise
calculation if the x-axis is scaled by fEOSC/307200. For
large values of the ratio fEOSC/307200, the Figure 25 plot
accuracy begins to decrease, but at the same time the
LTC2483 noise floor rises and the noise contribution of
the driving amplifiers lose significance.
Normal Mode Rejection and Antialiasing
One of the advantages delta-sigma ADCs offer over
conventional ADCs is on-chip digital filtering. Combined
with a large oversampling ratio, the LTC2483 significantly
simplifies antialiasing filter requirements. Additionally,
the input current cancellation feature of the LTC2483 al-
lows external lowpass filtering without degrading the DC
performance of the device.
TheSINC4digitalfilterprovidesgreaterthan120dBnormal
mode rejection at all frequencies except DC and integer
multiples of the modulator sampling frequency (fS). The
LTC2483’s autocalibration circuits further simplify the
antialiasing requirements by additional normal mode
signal filtering both in the analog and digital domain.
Independent of the operating mode, fS = 256 fN = 2048
fOUT(MAX) where fN is the notch frequency and fOUT(MAX)
is the maximum output data rate. In the internal oscillator
mode, fS = 13960Hz. In the external oscillator mode, fS =
fEOSC/20. The performance of the normal mode rejection
is shown in Figures 26 and 27.
The regions of low rejection occurring at integer multiples
of fS have a very narrow bandwidth. Magnified details of
the normal mode rejection curves are shown in Figure 28
(rejection near DC) and Figure 29 (rejection at fS = 256fN)
where fN represents the notch frequency. These curves
have been derived for the external oscillator mode but
they can be used in all operating modes by appropriately
selecting the fN value.
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