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參數(shù)資料
| 型號： | LTC2484CDD#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 20/42頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT 10-DFN |
| 標準包裝： | 2,500 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 6.8 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 480µW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-WFDFN 裸露焊盤 |
| 供應商設(shè)備封裝： | 10-DFN（3x3） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
| 配用： | DC939A-ND - BOARD DELTA SIGMA ADC LTC2484 |
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LTC2484
27
2484fd
APPLICATIONS INFORMATION
rithm that forces the average differential input current to
zero independent of external settling errors. This allows
accurate direct digitization of high impedance sensors
without the need for buffers. Additional errors resulting
from mismatched leakage currents must also be taken
into account.
The switching algorithm forces the average input current
on the positive input (IIN+) to be equal to the average input
current on the negative input (IIN–). Over the complete
conversion cycle, the average differential input current
(IIN+ – IIN–) is zero. While the differential input current
is zero, the common mode input current (IIN++ IIN–)/2 is
proportional to the difference between the common mode
input voltage (VINCM) and the common mode reference
voltage (VREFCM).
In applications where the input common mode voltage
is equal to the reference common mode voltage, as in
the case of a balance bridge type application, both the
differential and common mode input current are zero.
The accuracy of the converter is unaffected by settling
errors. Mismatches in source impedances between IN+
and IN– also do not affect the accuracy.
In applications where the input common mode voltage is
constant but different from the reference common mode
voltage, the differential input current remains zero while
the common mode input current is proportional to the
difference between VINCM and VREFCM. For a reference
common mode of 2.5V and an input common mode of
1.5V, the common mode input current is approximately
0.74μA (in simultaneous 50Hz/60Hz rejection mode). This
common mode input current has no effect on the accuracy
if the external source impedances tied to IN+ and IN– are
matched. Mismatches in these source impedances lead to
a xed offset error but do not affect the linearity or full-
scale reading. A 1% mismatch in 1k source resistances
leads to a 15ppm shift (74μV) in offset voltage.
In applications where the common mode input voltage
varies as a function of input signal level (single-ended
input, RTDs, half bridges, current sensors, etc.), the
common mode input current varies proportionally with
input voltage. For the case of balanced input impedances,
the common mode input current effects are rejected by
the large CMRR of the LTC2484 leading to little degrada-
tion in accuracy. Mismatches in source impedances lead
to gain errors proportional to the difference between the
common mode input voltage and the common mode ref-
erence voltage. 1% mismatches in 1k source resistances
lead to gain worst-case gain errors on the order of 15ppm
(for 1V differences in reference and input common mode
voltage). Table 6 summarizes the effects of mismatched
source impedance and differences in reference/input
common mode voltages.
Table 6. Suggested Input Conguration for LTC2484
BALANCED INPUT
RESISTANCES
UNBALANCED INPUT
RESISTANCES
Constant
VIN(CM) – VREF(CM)
CIN > 1nF at Both
IN+ and IN–. Can Take
Large Source Resistance
with Negligible Error
CIN > 1nF at Both IN+
and IN–. Can Take Large
Source Resistance.
Unbalanced Resistance
Results in an Offset
Which Can Be Calibrated
Varying
VIN(CM) – VREF(CM)
CIN > 1nF at Both IN+
and IN–. Can Take Large
Source Resistance with
Negligible Error
Minimize IN+ and IN–
Capacitors and Avoid
Large Source Impedance
(<5k Recommended)
The magnitude of the dynamic input current depends upon
the size of the very stable internal sampling capacitors and
upon the accuracy of the converter sampling clock. The
accuracy of the internal clock over the entire temperature
and power supply range is typically better than 0.5%. Such
a specication can also be easily achieved by an external
clock. When relatively stable resistors (50ppm/°C) are
used for the external source impedance seen by IN+ and
IN–, the expected drift of the dynamic current and offset
will be insignicant (about 1% of their respective values
over the entire temperature and voltage range). Even for
the most stringent applications, a one-time calibration
operation may be sufcient.
In addition to the input sampling charge, the input ESD
protection diodes have a temperature dependent leakage
current. This current, nominally 1nA (±10nA max), results
in a small offset shift. A 1k source resistance will create a
1μV typical and 10μV maximum offset voltage.
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| LTC2484IDD | 制造商:Linear Technology 功能描述:ADC Single Delta-Sigma 7.5sps 24-bit Serial 10-Pin DFN EP |
| LTC2484IDD#3GMPBF | 制造商:Linear Technology 功能描述: |
| LTC2484IDD#PBF | 功能描述:IC ADC 24BIT 10-DFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
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| LTC2484IDD#TRPBF | 功能描述:IC ADC 24BIT 10-DFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:2,500 系列:- 位數(shù):16 采樣率（每秒）:15 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:480µW 電壓電源:單電源 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:38-WFQFN 裸露焊盤 供應商設(shè)備封裝:38-QFN（5x7） 包裝:帶卷 (TR) 輸入數(shù)目和類型:16 個單端，雙極；8 個差分，雙極 配用:DC1011A-C-ND - BOARD DELTA SIGMA ADC LTC2494 |
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