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參數資料
| 型號： | LTC2751IUHF-14#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數： | 9/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT CUR OUT 38-QFN |
| 產品培訓模塊： | LTC275x 18-Bit DAC |
| 標準包裝： | 2,500 |
| 系列： | SoftSpan™ |
| 設置時間： | 2µs |
| 位數： | 14 |
| 數據接口： | 并聯 |
| 轉換器數目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 38-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 38-QFN（5x7） |
| 包裝： | 帶卷 (TR) |
| 輸出數目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | * |
LTC2751
17
2751fa
applicaTions inForMaTion
Op amp offset will contribute mostly to output offset and
gain error and has minimal effect on INL and DNL. For
the LTC2751-16, a 250V op amp offset will cause about
0.8LSB INL degradation and 0.2LSB DNL degradation
with a 5V reference. For the LTC2751 programmed in 5V
unipolar mode, the same 250V op amp offset will cause
a 3.3LSB zero-scale error and a 3.3LSB gain error.
While not directly addressed by the simple equations in
Tables 3 and 4, temperature effects can be handled just
as easily for unipolar and bipolar applications. First, con-
sult an op amp’s data sheet to find the worst-case VOS
and IB over temperature. Then, plug these numbers in
the VOS and IB equations from Table 4 and calculate the
temperature-induced effects.
For applications where fast settling time is important,
Application Note 74, “Component and Measurement
Advances Ensure 16-Bit DAC Settling Time,” offers a
thorough discussion of 16-bit DAC settling time and op
amp selection.
Precision Voltage Reference Considerations
Much in the same way selecting an operational amplifier
for use with the LTC2751 is critical to the performance of
the system, selecting a precision voltage reference also
requiresduediligence.TheoutputvoltageoftheLTC2751is
directlyaffectedbythevoltagereference;thus,anyvoltage
reference error will appear as a DAC output voltage error.
There are three primary error sources to consider when
selecting a precision voltage reference for 16-bit appli-
cations: output voltage initial tolerance, output voltage
temperature coefficient and output voltage noise.
Initial reference output voltage tolerance, if uncorrected,
generates a full-scale error term. Choosing a reference
with low output voltage initial tolerance, like the LT1236
(±0.05%), minimizes the gain error caused by the refer-
ence; however, a calibration sequence that corrects for
system zero- and full-scale error is always recommended.
Areference’soutputvoltagetemperaturecoefficientaffects
not only the full-scale error, but can also affect the circuit’s
INL and DNL performance. If a reference is chosen with
a loose output voltage temperature coefficient, then the
DAC output voltage along its transfer characteristic will
be very dependent on ambient conditions. Minimizing
the error due to reference temperature coefficient can be
achieved by choosing a precision reference with a low
output voltage temperature coefficient and/or tightly con-
trolling the ambient temperature of the circuit to minimize
temperature gradients.
As precision DAC applications move to 16-bit and higher
performance, reference output voltage noise may contrib-
ute a dominant share of the system’s noise floor. This in
turn can degrade system dynamic range and signal-to-
noise ratio. Care should be exercised in selecting a voltage
reference with as low an output noise voltage as practi-
cal for the system resolution desired. Precision voltage
references, like the LT1236, produce low output noise in
the 0.1Hz to 10Hz region, well below the 16-bit LSB level
in 5V or 10V full-scale systems. However, as the circuit
bandwidths increase, filtering the output of the reference
may be required to minimize output noise.
Table 6. Partial List of LTC Precision References Recommended
for Use with the LTC2751 with Relevant Specifications
REFERENCE
INITIAL
TOLERANCE
TEMPERATURE
DRIFT
0.1Hz to 10Hz
NOISE
LT1019A-5,
LT1019A-10
±0.05%
5ppm/°C
12VP-P
LT1236A-5,
LT1236A-10
±0.05%
5ppm/°C
3VP-P
LT1460A-5,
LT1460A-10
±0.075%
10ppm/°C
20VP-P
LT1790A-2.5
±0.05%
10ppm/°C
12VP-P
Grounding
As with any high resolution converter, clean grounding is
important. A low impedance analog ground plane and star
grounding techniques should be used. IOUT2 must be tied
to the star ground with as low a resistance as possible.
When it is not possible to locate star ground close to
IOUT2, a low resistance trace should be used to route this
pin to star ground. This minimizes the voltage drop from
this pin to ground caused by the code dependent current
flowing to ground. When the resistance of this circuit
board trace becomes greater than 1
W, a force/sense am-
plified configuration should be used to drive this pin (see
Figure 2). This preserves the excellent accuracy (1LSB
INL and DNL) of the LTC2751-16.
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