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參數(shù)資料
| 型號： | LTC2758BILX#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 18BIT SPI/SRL 48-LQFP |
| 標準包裝： | 250 |
| 系列： | SoftSpan™ |
| 設(shè)置時間： | 2.1µs |
| 位數(shù)： | 18 |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極；4 電流，雙極 |
| 配用： | DC1684A-A-ND - BOARD DAC LTC2758 |
LTC2758
20
2758fa
For more information www.linear.com/LTC2758
APPLICATIONS INFORMATION
Table 7. Partial List of LTC Precision References Recommended
for Use with the LTC2758 with Relevant Specifications
REFERENCE
INITIAL
TOLERANCE
TEMPERATURE
DRIFT
0.1Hz to 10Hz
NOISE
LT1019A-5,
LT1019A-10
±0.05% max
5ppm/°C max
12VP-P
LT1236A-5,
LT1236A-10
±0.05% max
5ppm/°C max
3VP-P
LT1460A-5,
LT1460A-10
±0.075% max
10ppm/°C max
20VP-P
LT1790A-2.5
±0.05% max
10ppm/°C max
12VP-P
LTC6652A-5
±0.05% max
5ppm/°C max
2.8ppmP-P
LTC6655A-2.5
LTC6655A-5
±0.025% max
2ppm/°C max
0.25ppmP-P
As precision DAC applications move to 18-bit perfor-
mance, reference output voltage noise may contribute a
dominant share of the system’s noise floor. This in turn can
degrade system dynamic range and signal-to-noise ratio.
Care should be exercised in selecting a voltage reference
with as low an output noise voltage as practical for the
system resolution desired. Precision voltage references
like the LT1236 or LTC6655 produce low output noise in
the 0.1Hz to 10Hz region, well below the 18-bit LSB level
in 5V or 10V full-scale systems. However, as the circuit
bandwidths increase, filtering the output of the reference
may be required to minimize output noise.
Grounding
As with any high-resolution converter, clean grounding
is important. A low-impedance analog ground plane is
necessary, as are star grounding techniques. Keep the
board layer used for star ground continuous to minimize
ground resistances; that is, use the star-ground concept
without using separate star traces. The IOUT2 pins are
of particular concern; INL will be degraded by the code-
dependent currents carried by the IOUT2XF and IOUT2XS
pins if voltage drops to ground are allowed to develop.
The best strategy here is to tie the pins to the star ground
plane by multiple vias located directly underneath the part.
Alternatively, the pins may be routed to the star ground
point if necessary; join the force and sense pins together
at the part and route one trace for each channel of no more
than 30 squares of 1oz copper.
In the rare case in which neither of these alternatives is
practicable, a force/sense amplifier should be used as a
ground buffer (see Figure 4). Note, however, that the volt-
age offset of the ground buffer amp directly contributes to
the effects on accuracy specified in Table 5 under ‘VOS1’.
The combined effects of the offsets can be calculated by
substituting the total offset from IOUT1X to IOUT2XS for
VOS1 in the equations.
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