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參數(shù)資料
| 型號(hào)： | LTC2900 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Octal Buffer/Driver With 3-State OUtputs 20-TVSOP -40 to 85 |
| 中文描述： | 可編程四路電源監(jiān)視器可調(diào)復(fù)位定時(shí)器 |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大?。?/td> | 199K |
| 代理商： | LTC2900 |
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9
LTC2900
2900f
Power-Up
The greater of V1, V2 is the internal supply voltage (V
CC
).
On power-up, V
CC
will power the drive circuits for the RST
pin. This ensures that the RST output will be low as soon
as V1 or V2 reaches 1V. The RST output will remain low until
the part is programmed. After programming, if any one of
the V
X
inputs is below its programmed threshold, RST will
be a logic low. Once all the V
X
inputs rise above their thresh-
olds, an internal timer is started and RST is released after
the programmed delay time. If V
CC
< (V3 – 1) and V
CC
< 2.4V,
the V3 input impedance will be low (1k
typ).
Monitor Programming
The LTC2900 input voltage combination is selected by
placing the recommended resistive divider from V
REF
to
GND and connecting the tap point to V
PG
, as shown in
Figure 4. Table 1 offers recommended 1% resistor values
for the various modes. The last column in Table 1 specifies
optimum V
PG
/V
REF
ratios (
±
0.01) to be used when pro-
gramming with a ratiometric DAC.
During power-up, once V1 or V2 reaches 2.4V max, the
monitor enters a programming period of approximately
150
μ
s during which the voltage on the V
PG
pin is sampled
and the monitor is configured to the desired input combi-
nation. Do not add capacitance to the V
PG
pin. Immediately
after programming, the comparators are enabled and
supply monitoring will begin.
APPLICATIOU
W
U
U
Figure 4. Monitor Programming
Table 1. Voltage Threshold Programming
V
PG
V
REF
0.000
0.094
0.156
0.219
0.281
0.344
0.406
0.469
0.531
0.594
0.656
0.719
0.781
0.844
0.906
1.000
MODE
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
V1 (V)
5.0
5.0
3.3
3.3
3.3
5.0
5.0
5.0
5.0
5.0
3.3
3.3
3.3
5.0
5.0
5.0
V2 (V)
3.3
3.3
2.5
2.5
2.5
3.3
3.3
3.3
3.0
3.0
2.5
2.5
2.5
3.3
3.3
3.0
V3 (V)
ADJ
ADJ
ADJ
ADJ
1.5
2.5
2.5
2.5
2.5
ADJ
1.8
1.8
1.8
1.8
1.8
1.8
V4 (V) R1 (k
) R2 (k
)
ADJ
Open
–ADJ
93.1
ADJ
86.6
–ADJ
78.7
ADJ
71.5
ADJ
66.5
1.8
59.0
1.5
53.6
ADJ
47.5
ADJ
40.2
1.5
34.8
ADJ
28.0
–ADJ
22.1
–ADJ
16.2
ADJ
9.53
ADJ
Short
Short
9.53
16.2
22.1
28.0
34.8
40.2
47.5
53.6
59.0
66.5
71.5
78.7
86.6
93.1
Open
8
7
6
R1
1%
R2
1%
2900 F04
V
REF
V
PG
GND
LTC2900
Supply Monitoring
The LTC2900 is a low power, high accuracy program-
mable quad supply monitoring circuit with a common
reset output and a manual reset input. Reset timing is
adjustable using an external capacitor. Single pin pro-
gramming selects 1 of 16 input voltage monitor combina-
tions. All four voltage inputs must be above predetermined
thresholds for the reset not to be invoked. The LTC2900
will assert the reset output during power-up, power-down
and brownout conditions on any one of the voltage inputs.
The inverting inputs on the V3 and/or V4 comparators are
set to 0.5V when the positive adjustable modes are se-
lected (Figure 5). The tap point on an external resistive
divider, connected between the positive voltage being
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| LTC2900-1CDD | 功能描述:IC MON SUPP QUAD OPEN DRN 10DFN RoHS:否 類別:集成電路 (IC) >> PMIC - 監(jiān)控器 系列:- 其它有關(guān)文件:STM6717 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 類型:多壓監(jiān)控器 監(jiān)視電壓數(shù)目:2 輸出:開路漏極或開路集電極 復(fù)位:低有效 復(fù)位超時(shí):最小為 600 ms 電壓 - 閥值:1.11V，3.075V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SC-74A，SOT-753 供應(yīng)商設(shè)備封裝:SOT-23-5 包裝:Digi-Reel® 產(chǎn)品目錄頁(yè)面:1194 (CN2011-ZH PDF) 其它名稱:497-7019-6 |
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