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參數(shù)資料
| 型號： | LTC3409 |
| 廠商： | Linear Technology Corporation |
| 元件分類： | DRAM |
| 英文描述： | 64 x 18 3.3-V asynchronous FIFO memory 56-SSOP 0 to 70 |
| 中文描述： | 600mA的低輸入電壓降壓穩(wěn)壓器x 3mm DFN封裝采用3mm |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 246K |
| 代理商： | LTC3409 |
12
LTC3409
3409f
1. The V
IN
quiescent current is due to two components: the
DC bias current as given in the Electrical Characteristics
and the internal main switch and synchronous switch
gate charge currents. The gate charge current results
from switching the gate capacitance of the internal power
MOSFET switches. Each time the gate is switched from
high to low to high again, a packet of charge, dQ, moves
from V
IN
to ground. The resulting dQ/dt is the current
out of V
IN
that is typically larger than the DC bias cur-
rent. In continuous mode, I
GATECHG
= (Q
T
+ Q
B
) where
Q
T
and Q
B
are the gate charges of the internal top and
bottom switches. Both the DC bias and gate charge losses
are proportional to V
IN
and thus their effects will be more
pronounced at higher supply voltages.
2. I
2
R losses are calculated from the resistances of the
internal switches, R
SW
, and external inductor R
L
. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R
DS(ON)
and the duty cycle
(DC) as follows:
R
SW
= (R
DS(ON)TOP
)(DC) + (R
DS(ON)BOT
)(1 – DC)
The R
DS(ON)
for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteris-
tics. Thus, to obtain I
2
R losses, simply add R
SW
to R
L
and multiply the result by the square of the average
output current.
Other losses including C
IN
and C
OUT
ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
Thermal Considerations
In most applications the LTC3409 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3409 is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such as
in dropout, the heat dissipated may exceed the maximum
junction temperature of the part. If the junction tempera-
ture reaches approximately 150
°
C, both power switches
will be turned off and the SW node will become high
impedance.
To avoid the LTC3409 from exceeding the maximum
junction temperature, the user will need to do a thermal
analysis. The goal of the thermal analysis is to determine
whether the operating conditions exceed the maximum
junction temperature of the part. The temperature rise is
given by:
T
R
= (P
D
)(
θ
JA
)
where P
D
is the power dissipated by the regulator and
θ
JA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, T
J
, is given by:
T
J
= T
A
+ T
R
where T
A
is the ambient temperature.
As an example, consider the LTC3409 in dropout at an
input voltage of 1.6V, a load current of 600mA and an
ambient temperature of 75
°
C. From the typical perfor-
mance graph of switch resistance, the R
DS(ON)
of the
P-channel switch at 75
°
C is approximately 0.48
. There-
fore, power dissipated by the part is:
P
D
= I
LOAD2
R
DS(ON)
= 172.8mW
For the DD8 package, the
θ
JA
is 43
°
C/W. Thus, the junction
temperature of the regulator is:
T
J
= 75
°
C + (0.1728)(43) = 82.4
°
C
which is well below the maximum junction temperature of
125
°
C.
APPLICATIU
W
U
U
Figure 2
LOAD CURRENT (mA)
0.001
P
0.01
0.1
1
0.1
10
100
1000
3409 F02
0.0001
1
BURST
PULSE SKIP
2.5V
IN
2.5V
IN
4.2V
IN
4.2V
IN
3.6V
IN
3.6V
IN
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| LTC3409AEDD#TRPBF | 功能描述:IC REG BUCK SYNC ADJ 0.6A 8DFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 開關穩(wěn)壓器 系列:- 標準包裝:2,500 系列:- 類型:升壓（升壓） 輸出類型:可調(diào)式 輸出數(shù):1 輸出電壓:1.24 V ~ 30 V 輸入電壓:1.5 V ~ 12 V PWM 型:電流模式，混合 頻率 - 開關:600kHz 電流 - 輸出:500mA 同步整流器:無 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR) 供應商設備封裝:8-SOIC |
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