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參數(shù)資料
| 型號： | LTC3445EUF#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.8 A SWITCHING REGULATOR, 1800 kHz SWITCHING FREQ-MAX, PQCC24 |
| 封裝： | 4 X 4 MM, PLASTIC, MO-220-WGGD, QFN-24 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大小： | 470K |
| 代理商： | LTC3445EUF#TR |
21
LTC3445
3445fa
As an example, consider the LTC3445 in dropout at an
input voltage of 2.7V, an ambient temperature of 70
°C, a
buck load current of 600mA, LDO1 set to 1.3V with a load
of 25mA, LDO2 set to 1.1V with a load of 15mA, and the
PowerPath regulator at 2.5V with a load of 6
A. From the
typical performance graph of switch resistance, the RDS(ON)
of the P-channel switch at 70
°C is approximately 0.52.
Therefore, power dissipated by the part is:
PD(BUCK) = ILOAD 2 RDS(ON) = 180mW
PD(LDO1) = (2.7 – 1.3)V 0.025A = 35mW
PD(LDO2) = (2.7 – 1.1)V 0.015A = 24mW
PD(PowerPath) = (2.7 – 2.5)V 6A = 1.2W
PD(TOTAL) = 0.239W
For the QFN24 package, the
θJA is 37°C/W. Thus, the
junction temperature of the regulator is:
TJ = 70°C + (0.239)(37) = 78.8°C
which is well below the maximum junction temperature of
125
°C. Note that at higher supply voltages, the junction
temperature is lower due to reduced switch resistance
(RDS(ON)).
PC BOARD LAYOUT CHECKLIST
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3445. These items are also illustrated graphically in
Figures 9 and 10. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace, the VCC1 trace and the VCC2 trace should be kept
short, direct and wide.
2. Does the FB pin connect directly to the output voltage
reference? Ensure that there is no load current running
from the reference voltage and the FB pin.
3. Does the (+) plate of CIN1 connect to VCC1 as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the switching node, SW, away from the sensitive
FB node.
5. Keep the (–) plates of CIN and COUT as close as possible.
APPLICATIO S I FOR ATIO
WU
UU
Figure 9
Figure 10
VCC1
10
CC1
GND
OUT
3445 F09
SW
RUN
FB
GND
25
NC
12
GND
11
NC
13
SW
14
RUN
15
NC
16
VIA TO
OUT
VIA TO
FB
17
CIN
COUT
L1
VCC1
10
3445 f10
GND
25
L1
VOUT
BOLD LINES INDICATE HIGH CURRENT PATH
VCC1
CIN
NC
12
GND
11
NC
13
SW
14
RUN
15
NC
16
FB
17
COUT
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