參數(shù)資料
型號: LTC3445EUF#TR
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.8 A SWITCHING REGULATOR, 1800 kHz SWITCHING FREQ-MAX, PQCC24
封裝: 4 X 4 MM, PLASTIC, MO-220-WGGD, QFN-24
文件頁數(shù): 3/24頁
文件大?。?/td> 470K
代理商: LTC3445EUF#TR
11
LTC3445
3445fa
TI I G DIAGRA
U
WW
tBUF
tSUSTO
3445 TD
tHD(STA)
tHD(DAT)
tSU(STA)
tSU(DAT)
tLOW
tHIGH
tr
tf
tHD(STA)
SCL
SDA
START
CONDITION
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
I2C Fast Mode Timing Specifications (for Reference)
SYMBOL
PARAMETER
MIN
TYP
MAX
UNITS
fI2C(MAX)
Maximum I2C Operating Frequency
0
400
kHz
tBUF
Bus Free Time Between Stop and Start Condition
1.3
s
tHD(RSTA)
Hold Time After (Repeated) Start Condition
0.6
s
tSU(RSTA)
Repeated Start Condition Setup Time
0.6
s
tSU(STOP)
Stop Condition Setup Time
0.6
s
tHD(DAT)
Data Hold Time
0
0.9
ns
tSU(DAT)
Data Setup Time
100
ns
tLOW
Clock Low Period
1.3
s
tHIGH
Clock High Period
0.6
s
tSP
Pulse Width of Spikes Suppressed by Input Filter
0
50
ns
tf
Clock, Data Fall Time (Note 1)
20 + 0.1
300
ns
CB
tr
Clock, Data Rise Time (Note 1)
20 + 0.1
300
ns
CB
Note 1: CB = Capacitance of one bus line.
OPERATIO
U
(refer to Figure 1)
BUCK REGULATOR
Main Control Loop
The LTC3445 uses a constant or spread spectrum fre-
quency, current mode step-down architecture (Figure 2).
Both the main (P-channel MOSFET) and synchronous
(N-channel MOSFET) switches are internal. During normal
operation, the internal top power MOSFET is turned on
each cycle when the oscillator sets the RS latch, and
turned off when the current comparator, ICOMP, resets the
RS latch. The peak inductor current at which ICOMP resets
the RS latch is controlled by the output of error amplifier
EA. When the load current increases, it causes a slight
decrease in the feedback voltage, FB, relative to an internal
reference voltage, which in turn, causes the EA’s output
voltage to increase until the average inductor current
matches the new load current. While the top MOSFET is
off, the bottom MOSFET is turned on until either the
inductor current starts to reverse, as indicated by the
current reversal comparator IRCMP, or the beginning of the
next clock cycle.
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