參數(shù)資料
型號: LTC3445EUF#TRPBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 0.8 A SWITCHING REGULATOR, 1800 kHz SWITCHING FREQ-MAX, PQCC24
封裝: 4 X 4 MM, LEAD FREE, PLASTIC, MO-220-WGGD, QFN-24
文件頁數(shù): 15/24頁
文件大小: 470K
代理商: LTC3445EUF#TRPBF
22
LTC3445
3445fa
APPLICATIO S I FOR ATIO
WU
UU
DESIGN EXAMPLE
As a design example, assume the LTC3445 is used in a
single lithium-ion battery-powered Intel PXA270 micro-
processor application. The battery will be operating from
a maximum of 4.2V down to about 2.7V. Also, the battery
will be connected to all three power pins on the LTC3445.
The desired LDO outputs are 1.3V with a 23mA load and
1.1V with a 14mA load. Since both LDO’s are the same, we
will select LDO1 for the 1.3V output and LDO2 for the 1.1V
output. Using Equations 4 and 5, and choosing R2 and R4
to be 604k, the values for R1 and R2 are 705k and 503k
respectively. Also, selecting a 10
F output capacitor pro-
vides adequate stability and transient reponses.
The PXA270’s VCCBATTrequirementcanbereadilyhandled
by the LTC3445’s PowerPath control circuits. By simply
connecting a coin cell battery to VBACKUP, the PowerPath
control circuits regulate VCC BATT within the PXA270’s
requirements.
The buck regulator’s maximum load requirement for this
application is 300mA. Although the default start-up volt-
age for the buck regulator is 1.35V, ripple current is
greatest when the output voltage is programmed to 0.85V.
For ripple currents of 200mA and the main battery at 4.2V,
the required inductor value is 2.2
H (Equation 1). For best
efficiency choose a 400mA or greater inductor with less
than 0.3
series resistance. Choosing a 10F output
capacitor with an ESR of 0.25
will generate a ripple
voltage of 52mV (Equation 3). In most cases, a ceramic
capacitor’s ESR will be less than 0.25
further reducing
the output ripple (see Figure 11). Note that as VCC1
decreases or VOUT increases, the ripple current and ripple
voltage will decrease. The input capacitor, CIN, will require
an RMS current rating of at least 0.150A
ILOAD(MAX)/2 at
temperature (Equation 2).
Figure 11. Design Example
LDO2FB
LDO2
SDA
SCL
1.1V
3445 F11
604k
10
F
CER
503k
VCC_SRAM
LDO1FB
LDO1
FB
SW
1.3V
0.85V TO
1.55V
SUMIDA
CDRH3D16/HP2R2
2.2
H
604k
3k
10
F
CER
10
F
CER
10
F
CER
705k
3V_TYP
VTRACK
VBACKUP
VCC
VCC_PLL
VCC_CORE
VCC BATT
LTC3445
LTC3406
BUCK
PWR_EN
BATTFAULT
SYS_EN
PGOOD
RUN
VCC1
VCC2
ADD7
ADD6
I2C BUS
3V
VCC_BATT
VCC_IO
INTEL PXA270
2.5V TO 5.5V
LITHIUM ION
3V
COIN CELL
nVCC_FAULT
20k
VCC
nBATT_FAULT
20k
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