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參數(shù)資料
| 型號： | LTC3537EUD#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 13/22頁 |
| 文件大小： | 314K |
| 描述： | IC REG DL BST/LINEAR SYNC 16-QFN |
| 標準包裝： | 2,500 |
| 拓撲： | 升壓（升壓）同步（1），線性（LDO）（1） |
| 功能： | 任何功能 |
| 輸出數(shù)： | 2 |
| 頻率 - 開關(guān)： | 2.2MHz |
| 電壓/電流 - 輸出 1： | 1.5 V ~ 5.25 V，100mA |
| 電壓/電流 - 輸出 2： | 0.6 V ~ 5 V，100mA |
| 帶 LED 驅(qū)動器： | 無 |
| 帶監(jiān)控器： | 無 |
| 帶序列發(fā)生器： | 是 |
| 電源電壓： | 0.68 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
LTC3537
13
3537fd
OPERATION
Burst Mode operation is inhibited during start-up and soft-
start and until V
OUTB
is at least 0.24V greater than V
INB
.
The LTC3537 will operate at a continuous PWM frequency
of 2.2MHz by connecting MODE to GND. At very light loads,
the LTC3537 will exhibit pulse-skip operation.
Single Cell to 5V Step-Up Applications
Due to the high inductor current slew rate in applications
boosting to 5V from a single-cell (alkaline, NiCd or NiMH),
the LTC3537 may not enter Burst Mode operation for input
voltages less than 1.2V. Refer to the Typical Performance
Characteristics curves for the Burst Mode thresholds for
different input and output voltages.
LDO REGULATOR OPERATION
The LTC3537 includes an independent 100mA low dropout
linear regulator (LDO). The V
INL
pin can be connected to
an independent source or connected to the output of the
boost regulator. An input capacitor on V
INL
is optional, but
it will help to improve transient responses. The LDO will
operate with a V
INL
down to 1.5V, but speci cations are
guaranteed with V
INL
from 1.8V to 5.5V.
Shutdown
Shutdown of the LDO is accomplished by pulling ENLDO
below 0.3V and enabled by pulling ENLDO above 0.8V. Note
that ENLDO can be driven above V
INL
or V
OLDO
, as long
as it is limited to less than the absolute maximum rating.
In the event that the LDO output voltage is held above the
input voltage, the LDO goes in to shutdown until the output
drops back below the input voltage. In shutdown the LDO
will block reverse current from V
OLDO
to V
INL
.
LDO Error Ampli er
The non-inverting input of the transconductance error
ampli er is internally connected to a 0.6V reference and
the inverting input is connected to FBL. The control loop
compensation is provided internally. An external resistive
voltage divider from V
OLDO
to ground programs the output
voltage via FBL from 0.6V to 5V.
V
OLDO
=0.6V 1+
R4
R3
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
LDO Current Sensing and Limiting
Current is sensed across an internal resistor. The guaran-
teed minimum output current is 100mA.
LOW-BATTERY INDICATOR
The LTC3537 includes a low-battery comparator. The non-
inverting input of the comparator is internally connected
to a 0.58V reference and the inverting input is connected
to LBI. An external resistive voltage divider from V
INL
to
ground programs the threshold voltage. When the volt-
age at LBI drops below 0.58V, the open-drain N-channel
MOSFET will turn on. The N-channel MOSFET device is
forced off when both the step-up converter and LDO are
in shutdown.
V
LBI
=0.58V 1+
R6
R5
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
BOOST POWER-GOOD INDICATOR
The LTC3537 includes a power-good comparator for the
step-up converter. The non-inverting input of the compara-
tor is internally connected to a 1.08V reference and the
inverting input is connected to the FBB pin. The open-drain
MOSFET on PGDB will turn off when the output voltage
is typically within 6% of the programmed output voltage.
Output sequencing can be achieved by connecting PGDB to
the LDO enable pin (ENLDO). This would allow the user to
keep the LDO off until the step-up converter is regulating.
The N-channel MOSFET is forced on in shutdown.
LDO POWER-GOOD INDICATOR
The LTC3537 includes a power-good comparator for the
LDO. The non-inverting input of the comparator is internally
connected to a 540mV reference and the inverting input is
connected to the FBL pin. The open-drain MOSFET on the
PGDL pin will turn off when the output voltage is typically
within 4% of the programmed output voltage.
Output sequencing can be achieved by connecting PGDL to
the boost enable pin (ENBST). This would allow the user to
keep the step-up converter off until the LDO is regulating.
The N-channel MOSFET is forced on in shutdown.
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