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參數(shù)資料
| 型號： | LTC4221IGN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Dual Hot Swap Controller/ Power Sequencer with Dual Speed, Dual Level Fault Protection |
| 中文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SSOP-16 |
| 文件頁數(shù)： | 9/28頁 |
| 文件大小： | 311K |
| 代理商： | LTC4221IGN |
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9
LTC4221
4221f
PIU
FAULT (Pin 7):
Fault Status Input/Output. FAULT is a
bidirectional pin. As an input, pulsing V
FAULT
< 0.816V will
set the FAULT latch and bring the LTC4221 into the fault
state. As an output, FAULT is pulled high by an internal
3.8
μ
A pull-up under normal operating conditions. When
an overcurrent fault is detected by a SENSE pin or a
overvoltage fault detected by an FB pin, the FAULT latch is
set and the LTC4221 goes into the fault state. The FAULT
latch is reset by a UVLO or the ON1 pin being driven below
0.4V.
FILTER (Pin 8):
Overcurrent Fault Timing Filter. The
FILTER pin requires an external capacitor to ground to
adjust the response time of the two slow comparators. The
FILTER pin can be left unconnected for a default slow
comparator response time of 15
μ
s.
TIMER (Pin 9):
Analog System Timer. The TIMER pin
requires an external capacitor to ground to generate
timing delay cycles during start-up. The LTC4221’s initial
and start-up timing cycles are controlled by C
TIMER
and the
internal current sources connected to the TIMER pin.
GND (Pin 10):
Ground. Connect to a ground plane for
optimum performance.
PWRGD2 (Pin 11):
Channel 2 Power Good Output. Similar
functionality as PWRGD1. Controlled by FB2.
FB2 (Pin 12):
V
OUT2
Feedback Input. Similar functionality
as FB1. Monitors channel 2 output voltage, controls
PWRGD2 output and channel 2 start-up current limit.
GATE2 (Pin 13):
Channel 2 Gate Drive. Similar functional-
ity as GATE1. Controls the gate drive of the channel 2
external N-channel MOSFET. ON2 controls GATE2 in the
same manner as ON1 controls GATE1. V
ON1
< 0.4V over-
rides conditions at ON2 and GATE2 is held low by a 100
μ
A
current source. UVLO, overvoltage, overcurrent and exter-
nally generated faults override conditions at ON1 and ON2,
and pull GATE2 low.
SENSE2 (Pin 14):
Channel 2 Current Sense Input. Similar
functionality as SENSE1. Monitors channel 2 load current
through R
SENSE2
placed in the supply path between V
CC2
and SENSE2. To disable the current limit and circuit
breaker function for channel 2, tie SENSE2 to V
CC2
.
V
CC2
(Pin 15):
Channel 2 Positive Supply Input. V
CC2
can
range from 1V to 13.5V for normal operation but it must
be
≤
V
CC1
. An undervoltage lockout circuit disables both
channels whenever the voltage at V
CC2
is less than 0.8V.
ON2 (Pin 16):
Channel 2 On Input. GATE2 is pulled to
ground by a 100
μ
A current source when V
ON2
< 0.821V.
When V
ON2
> 0.851V, GATE2 ramps up after an initial
timing cycle.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LTC4221IGN#PBF | 功能描述:IC CTRLR HOTSWAP DUAL 16SSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:100 系列:- 類型:熱插拔開關 應用:通用 內(nèi)部開關:是 電流限制:可調(diào) 電源電壓:9 V ~ 13.2 V 工作溫度:-40°C ~ 150°C 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應商設備封裝:10-TDFN-EP（3x3） 包裝:管件 |
| LTC4221IGN#TR | 功能描述:IC CTRLR HOTSWAP DUAL 16SSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:100 系列:- 類型:熱插拔開關 應用:通用 內(nèi)部開關:是 電流限制:可調(diào) 電源電壓:9 V ~ 13.2 V 工作溫度:-40°C ~ 150°C 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應商設備封裝:10-TDFN-EP（3x3） 包裝:管件 |
| LTC4221IGN#TRPBF | 功能描述:IC CTRLR HOTSWAP DUAL 16SSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:100 系列:- 類型:熱插拔開關 應用:通用 內(nèi)部開關:是 電流限制:可調(diào) 電源電壓:9 V ~ 13.2 V 工作溫度:-40°C ~ 150°C 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應商設備封裝:10-TDFN-EP（3x3） 包裝:管件 |
| LTC4222 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual Hot Swap Controller |
| LTC4222_12 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual Hot Swap Controller |
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