參數(shù)資料
型號(hào)： LTC4259ACGW#TRPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 24/32頁(yè)
文件大?。?/td> 0K
描述： IC CTRLR POE QUAD AC DISC 36SSOP
標(biāo)準(zhǔn)包裝： 1,000
控制器類(lèi)型： 以太網(wǎng)供電控制器（POE）
接口： I²C
電源電壓： 3 V ~ 4 V
電流 - 電源： 2.5mA
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 36-BSOP（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 36-SSOP
包裝： 帶卷 (TR)
LTC4259A
30
4259afb
cases the port voltage must always stay between –44V
and –57V. In addition, the 802.3af specification places
specific ripple, noise and load regulation requirements on
the PSE. Among other things, disturbances on either VDD
or VEE can adversely affect detection, classification and the
AC disconnection sensing. Proper bypassing and stability
of the VDD and VEE supplies is important.
Another problem that can affect the VEE supply is insuffi-
cient power, leading to the supply voltage drooping out of
the specified range. The 802.3af specification states that
if a PSE powers a PD it must be able to provide the
maximum power level requested by the PD based on the
PD’s classification. The specification does allow a PSE to
choose not to power a port because the PD requires more
power than the PSE has left to deliver. If a PSE is built with
a VEE supply capable of less than 15.4W (number of
PSE’s Ethernet ports), it must implement a power alloca-
tion algorithm that prevents ports from being powered
when there is insufficient power. Because the specifica-
tion also requires the PSE to supply 400mA at up to a 5%
duty cycle, the VEE supply capability should be at least a
few percent more than the maximum total power the PSE
will supply to PDs. Finally, the LTC4259As draw current
from VEE. If the VDD supply is generated from VEE, that
APPLICATIO S I FOR ATIO
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power divided by the switcher efficiency must also be
added to the VEE supply’s capability.
Fast VEE transients can damage the LTC4259A. Limit the
VEE slew rate to 50mV/s. In most applications, existing
VEE bypass capacitors (described above) will cause the
VEE supply to slew much slower than 50mV/s.
OSCIN Input
AC disconnect also relies on an oscillating signal applied
to the OSCIN pin. Requirements for this signal are pro-
vided in the OSCIN Input and Oscillator Requirements
section. Out-of-band noise on the OSCIN pin will disrupt
the LTC4259A’s ability to sense the absence of a PD. Any
noise present at the OSCIN pin is amplified by the LTC4259A
and driven out of the DETECT pins (of powered ports with
AC disconnect enabled). Due to the amount of capacitance
connected to the DETECT pins, driving this noise can
easily require more than IACDMIN, tripping the DETECT pin
current sense and keeping the port powered. During
circuit board layout, keep wiring from the oscillator to the
OSCIN pin away from noise sources like digital clock and
data lines. A single-stage RC lowpass filter (shown in
Figure 22) will attenuate out-of-band noise.
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