參數(shù)資料
型號: LTC6945IUFD#PBF
廠商: Linear Technology
文件頁數(shù): 15/28頁
文件大小: 0K
描述: IC SYNTHESIZER INTEGER N 28QFN
軟件下載: PLLWizard™
PLLWizard™, with .NET 2.0 installer
標準包裝: 73
類型: *
PLL:
輸入: 時鐘
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 是/是
頻率 - 最大: 6GHz
除法器/乘法器: 是/無
電源電壓: 3.15 V ~ 5.25 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 28-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 28-QFN(4x5)
包裝: 管件
LTC6945
22
6945f
APPLICATIONS INFORMATION
OUTPUT PHASE NOISE DUE TO 1/f NOISE
In-band phase noise at very low offset frequencies may
be influenced by the LTC6945’s 1/f noise, depending upon
fPFD. Use the normalized in-band 1/f noise of –274dBc/Hz
with Equation 12 to approximate the output 1/f phase
noise at a given frequency offset fOFFSET:
LM(OUT –1/f) (fOFFSET) = –274 + 20 log10(fRF)
(12)
– 10 log10(fOFFSET)
Unlike the in-band noise floor LM(OUT), the 1/f noise
LM(OUT –1/f) does not change with fPFD and is not constant
over offset frequency. See Figure 17 for an example of
in-band phase noise for fPFD equal to 3MHz and 100MHz.
The total phase noise will be the summation of LM(OUT)
and LM(OUT –1/f).
The inputs may be used single-ended by applying the
AC-coupled VCO frequency at VCO+ and bypassing
VCOto GND with a 100pF capacitor (270pF for frequen-
cies less than 500MHz). Measured VCO+ s-parameters
(with VCObypassed with 100pF to GND) are shown in
Table 10 to aid in the design of external impedance match-
ing networks.
Table 10. Single-Ended VCO+ Input Impedance
FREQUENCY (MHz)
IMPEDANCE (Ω)
S11 (dB)
250
118 – j78
–5.06
500
83.6 – j68.3
–5.90
1000
52.8 – j56.1
–6.38
1500
35.2 – j41.7
–6.63
2000
25.7 – j30.2
–6.35
2500
19.7 – j20.6
–5.94
3000
17.6 – j11.2
–6.00
3500
17.8 – j3.92
–6.41
4000
19.8 + j4.74
–7.20
4500
21.5 + j15.0
–7.12
5000
21.1 + j19.4
–6.52
5500
27.1 + j22.9
–7.91
6000
38.3 + j33.7
–8.47
6500
36.7 + j42.2
–6.76
7000
46.2 + j40.9
–8.11
7500
76.5 + j36.8
–9.25
8000
84.1+ j52.2
–7.27
RF OUTPUT MATCHING
The RF± outputs may be used in either single-ended or
differential configurations. Using both RF outputs differen-
tially will result in approximately 3dB more output power
than single-ended. Impedance matching to an external
load in both cases requires external chokes tied to VRF+.
VCO INPUT MATCHING
The VCO± inputs may be used differentially or single-ended.
Each input provides a single-ended 121Ω resistance to aid
in impedance matching at high frequencies. The inputs are
self-biased and must be AC-coupled using a 100pF capaci-
tors (or 270pF for VCO frequencies less than 500MHz).
Figure 17. Theoretical In-Band Phase Noise, fRF = 2500MHz
OFFSET FREQUENCY (Hz)
–120
PHASE
NOISE
(dBc/Hz)
–90
10
100
10k
100k
6945 F17
1k
–100
–110
–130
TOTAL NOISE
fPFD = 3MHz
TOTAL NOISE
fPFD = 100MHz
1/f NOISE
CONTRIBUTION
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